1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "omap3-gta04.dtsi" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "Goldelico GTA04A5/Letux 2804"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun sound { 12*4882a593Smuzhiyun ti,jack-det-gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>; /* GTA04A5 only */ 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun wlan_en: wlan_en_regulator { 16*4882a593Smuzhiyun compatible = "regulator-fixed"; 17*4882a593Smuzhiyun pinctrl-names = "default"; 18*4882a593Smuzhiyun pinctrl-0 = <&wlan_pins>; 19*4882a593Smuzhiyun regulator-name = "wlan-en-regulator"; 20*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 21*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* GPIO_138 */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun startup-delay-us = <70000>; 26*4882a593Smuzhiyun enable-active-high; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun pps { 30*4882a593Smuzhiyun compatible = "pps-gpio"; 31*4882a593Smuzhiyun pinctrl-names = "default"; 32*4882a593Smuzhiyun pinctrl-0 = <&pps_pins>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; /* GPIN_114 */ 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun&gpio5 { 40*4882a593Smuzhiyun irda_en { 41*4882a593Smuzhiyun gpio-hog; 42*4882a593Smuzhiyun gpios = <(175-160) GPIO_ACTIVE_HIGH>; 43*4882a593Smuzhiyun output-high; /* activate gpio_175 to disable IrDA receiver */ 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&omap3_pmx_core { 48*4882a593Smuzhiyun bt_pins: pinmux_bt_pins { 49*4882a593Smuzhiyun pinctrl-single,pins = < 50*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* mmc2_dat5 = mmc3_dat1 = gpio137 */ 51*4882a593Smuzhiyun >; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun wlan_pins: pinmux_wlan_pins { 55*4882a593Smuzhiyun pinctrl-single,pins = < 56*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* mmc2_dat6 = mmc3_dat2 = gpio138 */ 57*4882a593Smuzhiyun >; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun wlan_irq_pin: pinmux_wlan_irq_pin { 61*4882a593Smuzhiyun pinctrl-single,pins = < 62*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE4) /* mmc2_dat7 = mmc3_dat3 = gpio139 */ 63*4882a593Smuzhiyun >; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun irda_pins: pinmux_irda { 67*4882a593Smuzhiyun pinctrl-single,pins = < 68*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21d0, PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcspi1_cs1 = gpio175 */ 69*4882a593Smuzhiyun >; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun pps_pins: pinmux_pps_pins { 73*4882a593Smuzhiyun pinctrl-single,pins = < 74*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2138, PIN_INPUT | MUX_MODE4) /* gpin114 */ 75*4882a593Smuzhiyun >; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun}; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun/* 81*4882a593Smuzhiyun * for WL183x module see 82*4882a593Smuzhiyun * Documentation/devicetree/bindings/net/wireless/ti,wlcore.txt 83*4882a593Smuzhiyun */ 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun&wifi_pwrseq { 86*4882a593Smuzhiyun /delete-property/ reset-gpios; 87*4882a593Smuzhiyun}; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun&mmc2 { 90*4882a593Smuzhiyun vmmc-supply = <&wlan_en>; 91*4882a593Smuzhiyun bus-width = <4>; 92*4882a593Smuzhiyun cap-power-off-card; 93*4882a593Smuzhiyun non-removable; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&wlan_irq_pin>; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #address-cells = <1>; 99*4882a593Smuzhiyun #size-cells = <0>; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /delete-property/ mmc-pwrseq; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun wlcore: wlcore@2 { 104*4882a593Smuzhiyun compatible = "ti,wl1837"; 105*4882a593Smuzhiyun reg = <2>; 106*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 107*4882a593Smuzhiyun interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_139 */ 108*4882a593Smuzhiyun ref-clock-frequency = <26000000>; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun&i2c2 { 113*4882a593Smuzhiyun /delete-node/ bmp085@77; 114*4882a593Smuzhiyun /delete-node/ bma180@41; 115*4882a593Smuzhiyun /delete-node/ itg3200@68; 116*4882a593Smuzhiyun /delete-node/ hmc5843@1e; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun bmg160@69 { 119*4882a593Smuzhiyun compatible = "bosch,bmg160"; 120*4882a593Smuzhiyun reg = <0x69>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun bmc150@10 { 124*4882a593Smuzhiyun compatible = "bosch,bmc150_accel"; 125*4882a593Smuzhiyun reg = <0x10>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun bmc150@12 { 129*4882a593Smuzhiyun compatible = "bosch,bmc150_magn"; 130*4882a593Smuzhiyun reg = <0x12>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun bme280@76 { 134*4882a593Smuzhiyun compatible = "bosch,bme280"; 135*4882a593Smuzhiyun reg = <0x76>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun}; 138