xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/omap3-cm-t3x.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Common support for CompuLab CM-T3x CoMs
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/ {
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun	memory@80000000 {
9*4882a593Smuzhiyun		device_type = "memory";
10*4882a593Smuzhiyun		reg = <0x80000000 0x10000000>; /* 256 MB */
11*4882a593Smuzhiyun	};
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	leds {
14*4882a593Smuzhiyun		compatible = "gpio-leds";
15*4882a593Smuzhiyun		pinctrl-names = "default";
16*4882a593Smuzhiyun		pinctrl-0 = <&green_led_pins>;
17*4882a593Smuzhiyun		ledb {
18*4882a593Smuzhiyun			label = "cm-t3x:green";
19*4882a593Smuzhiyun			gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>;  /* gpio186 */
20*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
21*4882a593Smuzhiyun		};
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	/* HS USB Port 1 Power */
25*4882a593Smuzhiyun	hsusb1_power: hsusb1_power_reg {
26*4882a593Smuzhiyun		compatible = "regulator-fixed";
27*4882a593Smuzhiyun		regulator-name = "hsusb1_vbus";
28*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
29*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
30*4882a593Smuzhiyun		startup-delay-us = <70000>;
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	/* HS USB Port 2 Power */
34*4882a593Smuzhiyun	hsusb2_power: hsusb2_power_reg {
35*4882a593Smuzhiyun		compatible = "regulator-fixed";
36*4882a593Smuzhiyun		regulator-name = "hsusb2_vbus";
37*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
38*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
39*4882a593Smuzhiyun		startup-delay-us = <70000>;
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	/* HS USB Host PHY on PORT 1 */
43*4882a593Smuzhiyun	hsusb1_phy: hsusb1_phy {
44*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
45*4882a593Smuzhiyun		vcc-supply = <&hsusb1_power>;
46*4882a593Smuzhiyun		#phy-cells = <0>;
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	/* HS USB Host PHY on PORT 2 */
50*4882a593Smuzhiyun	hsusb2_phy: hsusb2_phy {
51*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
52*4882a593Smuzhiyun		vcc-supply = <&hsusb2_power>;
53*4882a593Smuzhiyun		#phy-cells = <0>;
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	ads7846reg: ads7846-reg {
57*4882a593Smuzhiyun		compatible = "regulator-fixed";
58*4882a593Smuzhiyun		regulator-name = "ads7846-reg";
59*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
60*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	tv0: svideo-connector {
64*4882a593Smuzhiyun		compatible = "svideo-connector";
65*4882a593Smuzhiyun		label = "tv";
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun		port {
68*4882a593Smuzhiyun			tv_connector_in: endpoint {
69*4882a593Smuzhiyun				remote-endpoint = <&venc_out>;
70*4882a593Smuzhiyun			};
71*4882a593Smuzhiyun		};
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun&omap3_pmx_core {
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	uart3_pins: pinmux_uart3_pins {
78*4882a593Smuzhiyun		pinctrl-single,pins = <
79*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT  | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
80*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx_irtx.uart3_tx_irtx */
81*4882a593Smuzhiyun		>;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	mmc1_pins: pinmux_mmc1_pins {
85*4882a593Smuzhiyun		pinctrl-single,pins = <
86*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
87*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
88*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
89*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
90*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
91*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
92*4882a593Smuzhiyun		>;
93*4882a593Smuzhiyun	};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun	green_led_pins: pinmux_green_led_pins {
96*4882a593Smuzhiyun		pinctrl-single,pins = <
97*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4)	/* sys_clkout2.gpio_186 */
98*4882a593Smuzhiyun		>;
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun	dss_dpi_pins_common: pinmux_dss_dpi_pins_common {
102*4882a593Smuzhiyun		pinctrl-single,pins = <
103*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
104*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
105*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
106*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
109*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
110*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
111*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
112*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
113*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
114*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
115*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
116*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
117*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
118*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
119*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
120*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
121*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
122*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
123*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
124*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
125*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
126*4882a593Smuzhiyun		>;
127*4882a593Smuzhiyun	};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun	dss_dpi_pins_cm_t35x: pinmux_dss_dpi_pins_cm_t35x {
130*4882a593Smuzhiyun		pinctrl-single,pins = <
131*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
132*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
133*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
134*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
135*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
136*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
137*4882a593Smuzhiyun		>;
138*4882a593Smuzhiyun	};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	ads7846_pins: pinmux_ads7846_pins {
141*4882a593Smuzhiyun		pinctrl-single,pins = <
142*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ba, PIN_INPUT_PULLUP | MUX_MODE4)	/* gpmc_ncs6.gpio_57 */
143*4882a593Smuzhiyun		>;
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	mcspi1_pins: pinmux_mcspi1_pins {
147*4882a593Smuzhiyun		pinctrl-single,pins = <
148*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)	/* mcspi1_clk */
149*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0)	/* mcspi1_simo */
150*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0)	/* mcspi1_somi */
151*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0 */
152*4882a593Smuzhiyun		>;
153*4882a593Smuzhiyun	};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun	i2c1_pins: pinmux_i2c1_pins {
156*4882a593Smuzhiyun		pinctrl-single,pins = <
157*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_scl */
158*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c1_sda */
159*4882a593Smuzhiyun		>;
160*4882a593Smuzhiyun	};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun	mcbsp2_pins: pinmux_mcbsp2_pins {
163*4882a593Smuzhiyun		pinctrl-single,pins = <
164*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx */
165*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_clkx */
166*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr */
167*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dx */
168*4882a593Smuzhiyun		>;
169*4882a593Smuzhiyun	};
170*4882a593Smuzhiyun};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun&uart3 {
173*4882a593Smuzhiyun	pinctrl-names = "default";
174*4882a593Smuzhiyun	pinctrl-0 = <&uart3_pins>;
175*4882a593Smuzhiyun};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun&mmc1 {
178*4882a593Smuzhiyun	pinctrl-names = "default";
179*4882a593Smuzhiyun	pinctrl-0 = <&mmc1_pins>;
180*4882a593Smuzhiyun	bus-width = <4>;
181*4882a593Smuzhiyun};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun&mmc3 {
184*4882a593Smuzhiyun	status = "disabled";
185*4882a593Smuzhiyun};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun&i2c1 {
188*4882a593Smuzhiyun	pinctrl-names = "default";
189*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_pins>;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun	clock-frequency = <400000>;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun	at24@50 {
194*4882a593Smuzhiyun		compatible = "atmel,24c02";
195*4882a593Smuzhiyun		pagesize = <16>;
196*4882a593Smuzhiyun		reg = <0x50>;
197*4882a593Smuzhiyun	};
198*4882a593Smuzhiyun};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun&i2c3 {
201*4882a593Smuzhiyun	clock-frequency = <400000>;
202*4882a593Smuzhiyun};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun&usbhshost {
205*4882a593Smuzhiyun	port1-mode = "ehci-phy";
206*4882a593Smuzhiyun	port2-mode = "ehci-phy";
207*4882a593Smuzhiyun};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun&usbhsehci {
210*4882a593Smuzhiyun	phys = <&hsusb1_phy &hsusb2_phy>;
211*4882a593Smuzhiyun};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun&mcspi1 {
214*4882a593Smuzhiyun	pinctrl-names = "default";
215*4882a593Smuzhiyun	pinctrl-0 = <&mcspi1_pins>;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	/* touch controller */
218*4882a593Smuzhiyun	ads7846@0 {
219*4882a593Smuzhiyun		pinctrl-names = "default";
220*4882a593Smuzhiyun		pinctrl-0 = <&ads7846_pins>;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun		compatible = "ti,ads7846";
223*4882a593Smuzhiyun		vcc-supply = <&ads7846reg>;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun		reg = <0>;			/* CS0 */
226*4882a593Smuzhiyun		spi-max-frequency = <1500000>;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
229*4882a593Smuzhiyun		interrupts = <25 0>;		/* gpio_57 */
230*4882a593Smuzhiyun		pendown-gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun		ti,x-min = /bits/ 16 <0x0>;
233*4882a593Smuzhiyun		ti,x-max = /bits/ 16 <0x0fff>;
234*4882a593Smuzhiyun		ti,y-min = /bits/ 16 <0x0>;
235*4882a593Smuzhiyun		ti,y-max = /bits/ 16 <0x0fff>;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun		ti,x-plate-ohms = /bits/ 16 <180>;
238*4882a593Smuzhiyun		ti,pressure-max = /bits/ 16 <255>;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun		ti,debounce-max = /bits/ 16 <30>;
241*4882a593Smuzhiyun		ti,debounce-tol = /bits/ 16 <10>;
242*4882a593Smuzhiyun		ti,debounce-rep = /bits/ 16 <1>;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun		wakeup-source;
245*4882a593Smuzhiyun	};
246*4882a593Smuzhiyun};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun&venc {
249*4882a593Smuzhiyun	status = "okay";
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun	port {
252*4882a593Smuzhiyun		venc_out: endpoint {
253*4882a593Smuzhiyun			remote-endpoint = <&tv_connector_in>;
254*4882a593Smuzhiyun			ti,channels = <2>;
255*4882a593Smuzhiyun		};
256*4882a593Smuzhiyun	};
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&mcbsp2 {
260*4882a593Smuzhiyun	status = "okay";
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun	pinctrl-names = "default";
263*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp2_pins>;
264*4882a593Smuzhiyun};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun&gpmc {
267*4882a593Smuzhiyun	ranges = <0 0 0x30000000 0x01000000>;	/* CS0: 16MB for NAND */
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun	nand@0,0 {
270*4882a593Smuzhiyun		compatible = "ti,omap2-nand";
271*4882a593Smuzhiyun		reg = <0 0 4>;	/* CS0, offset 0, IO size 4 */
272*4882a593Smuzhiyun		interrupt-parent = <&gpmc>;
273*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
274*4882a593Smuzhiyun			     <1 IRQ_TYPE_NONE>;	/* termcount */
275*4882a593Smuzhiyun		nand-bus-width = <8>;
276*4882a593Smuzhiyun		gpmc,device-width = <1>;
277*4882a593Smuzhiyun		ti,nand-ecc-opt = "sw";
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun		gpmc,cs-on-ns = <0>;
280*4882a593Smuzhiyun		gpmc,cs-rd-off-ns = <120>;
281*4882a593Smuzhiyun		gpmc,cs-wr-off-ns = <120>;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun		gpmc,adv-on-ns = <0>;
284*4882a593Smuzhiyun		gpmc,adv-rd-off-ns = <120>;
285*4882a593Smuzhiyun		gpmc,adv-wr-off-ns = <120>;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun		gpmc,we-on-ns = <6>;
288*4882a593Smuzhiyun		gpmc,we-off-ns = <90>;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun		gpmc,oe-on-ns = <6>;
291*4882a593Smuzhiyun		gpmc,oe-off-ns = <90>;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun		gpmc,page-burst-access-ns = <6>;
294*4882a593Smuzhiyun		gpmc,access-ns = <72>;
295*4882a593Smuzhiyun		gpmc,cycle2cycle-delay-ns = <60>;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun		gpmc,rd-cycle-ns = <120>;
298*4882a593Smuzhiyun		gpmc,wr-cycle-ns = <120>;
299*4882a593Smuzhiyun		gpmc,wr-access-ns = <186>;
300*4882a593Smuzhiyun		gpmc,wr-data-mux-bus-ns = <90>;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun		#address-cells = <1>;
303*4882a593Smuzhiyun		#size-cells = <1>;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun		partition@0 {
306*4882a593Smuzhiyun			label = "xloader";
307*4882a593Smuzhiyun			reg = <0 0x80000>;
308*4882a593Smuzhiyun		};
309*4882a593Smuzhiyun		partition@80000 {
310*4882a593Smuzhiyun			label = "uboot";
311*4882a593Smuzhiyun			reg = <0x80000 0x1e0000>;
312*4882a593Smuzhiyun		};
313*4882a593Smuzhiyun		partition@260000 {
314*4882a593Smuzhiyun			label = "uboot environment";
315*4882a593Smuzhiyun			reg = <0x260000 0x40000>;
316*4882a593Smuzhiyun		};
317*4882a593Smuzhiyun		partition@2a0000 {
318*4882a593Smuzhiyun			label = "linux";
319*4882a593Smuzhiyun			reg = <0x2a0000 0x400000>;
320*4882a593Smuzhiyun		};
321*4882a593Smuzhiyun		partition@6a0000 {
322*4882a593Smuzhiyun			label = "rootfs";
323*4882a593Smuzhiyun			reg = <0x6a0000 0x1f880000>;
324*4882a593Smuzhiyun		};
325*4882a593Smuzhiyun	};
326*4882a593Smuzhiyun};
327