xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/omap3-cm-t3730.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Support for CompuLab CM-T3730
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun/dts-v1/;
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "omap36xx.dtsi"
8*4882a593Smuzhiyun#include "omap3-cm-t3x30.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "CompuLab CM-T3730";
12*4882a593Smuzhiyun	compatible = "compulab,omap3-cm-t3730", "ti,omap3630", "ti,omap36xx", "ti,omap3";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	wl12xx_vmmc2: wl12xx_vmmc2 {
15*4882a593Smuzhiyun		compatible = "regulator-fixed";
16*4882a593Smuzhiyun		regulator-name = "vw1271";
17*4882a593Smuzhiyun		pinctrl-names = "default";
18*4882a593Smuzhiyun		pinctrl-0 = <&wl12xx_gpio>;
19*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
20*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
21*4882a593Smuzhiyun		gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;   /* gpio73 */
22*4882a593Smuzhiyun		startup-delay-us = <20000>;
23*4882a593Smuzhiyun		enable-active-high;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	wl12xx_vaux2: wl12xx_vaux2 {
27*4882a593Smuzhiyun		compatible = "regulator-fixed";
28*4882a593Smuzhiyun		regulator-name = "vwl1271_vaux2";
29*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
30*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
31*4882a593Smuzhiyun		vin-supply = <&vaux2>;
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun&omap3_pmx_wkup {
36*4882a593Smuzhiyun	dss_dpi_pins_cm_t3730: pinmux_dss_dpi_pins_cm_t3730 {
37*4882a593Smuzhiyun		pinctrl-single,pins = <
38*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a08, PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
39*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
40*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
41*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
42*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
43*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
44*4882a593Smuzhiyun		>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun&omap3_pmx_core {
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	mmc2_pins: pinmux_mmc2_pins {
51*4882a593Smuzhiyun		pinctrl-single,pins = <
52*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
53*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
54*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
55*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
56*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
57*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
58*4882a593Smuzhiyun		>;
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	wl12xx_gpio: pinmux_wl12xx_gpio {
62*4882a593Smuzhiyun		pinctrl-single,pins = <
63*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)	/* dss_data3.gpio_73 */
64*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4)	/* sdmmc2_dat4.gpio_136 */
65*4882a593Smuzhiyun		>;
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun&mmc2 {
70*4882a593Smuzhiyun	pinctrl-names = "default";
71*4882a593Smuzhiyun	pinctrl-0 = <&mmc2_pins>;
72*4882a593Smuzhiyun	vmmc-supply = <&wl12xx_vmmc2>;
73*4882a593Smuzhiyun	vqmmc-supply = <&wl12xx_vaux2>;
74*4882a593Smuzhiyun	non-removable;
75*4882a593Smuzhiyun	bus-width = <4>;
76*4882a593Smuzhiyun	cap-power-off-card;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	#address-cells = <1>;
79*4882a593Smuzhiyun	#size-cells = <0>;
80*4882a593Smuzhiyun	wlcore: wlcore@2 {
81*4882a593Smuzhiyun		compatible = "ti,wl1271";
82*4882a593Smuzhiyun		reg = <2>;
83*4882a593Smuzhiyun		interrupt-parent = <&gpio5>;
84*4882a593Smuzhiyun		interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */
85*4882a593Smuzhiyun		ref-clock-frequency = <38400000>;
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun&dss {
90*4882a593Smuzhiyun	status = "okay";
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun	pinctrl-names = "default";
93*4882a593Smuzhiyun	pinctrl-0 = <
94*4882a593Smuzhiyun		&dss_dpi_pins_common
95*4882a593Smuzhiyun		&dss_dpi_pins_cm_t3730
96*4882a593Smuzhiyun	>;
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99