1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "omap36xx.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "TI OMAP3 BeagleBoard xM"; 11*4882a593Smuzhiyun compatible = "ti,omap3-beagle-xm", "ti,omap3630", "ti,omap36xx", "ti,omap3"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun cpus { 14*4882a593Smuzhiyun cpu@0 { 15*4882a593Smuzhiyun cpu0-supply = <&vcc>; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun memory@80000000 { 20*4882a593Smuzhiyun device_type = "memory"; 21*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; /* 512 MB */ 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun aliases { 25*4882a593Smuzhiyun display0 = &dvi0; 26*4882a593Smuzhiyun display1 = &tv0; 27*4882a593Smuzhiyun ethernet = ðernet; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* fixed 26MHz oscillator */ 31*4882a593Smuzhiyun hfclk_26m: oscillator { 32*4882a593Smuzhiyun #clock-cells = <0>; 33*4882a593Smuzhiyun compatible = "fixed-clock"; 34*4882a593Smuzhiyun clock-frequency = <26000000>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun leds { 38*4882a593Smuzhiyun compatible = "gpio-leds"; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun heartbeat { 41*4882a593Smuzhiyun label = "beagleboard::usr0"; 42*4882a593Smuzhiyun gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ 43*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun mmc { 47*4882a593Smuzhiyun label = "beagleboard::usr1"; 48*4882a593Smuzhiyun gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */ 49*4882a593Smuzhiyun linux,default-trigger = "mmc0"; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun pwmleds { 54*4882a593Smuzhiyun compatible = "pwm-leds"; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun pmu_stat { 57*4882a593Smuzhiyun label = "beagleboard::pmu_stat"; 58*4882a593Smuzhiyun pwms = <&twl_pwmled 1 7812500>; 59*4882a593Smuzhiyun max-brightness = <127>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun sound { 64*4882a593Smuzhiyun compatible = "ti,omap-twl4030"; 65*4882a593Smuzhiyun ti,model = "omap3beagle"; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun ti,mcbsp = <&mcbsp2>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun gpio_keys { 71*4882a593Smuzhiyun compatible = "gpio-keys"; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun user { 74*4882a593Smuzhiyun label = "user"; 75*4882a593Smuzhiyun gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 76*4882a593Smuzhiyun linux,code = <0x114>; 77*4882a593Smuzhiyun wakeup-source; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* HS USB Port 2 Power */ 83*4882a593Smuzhiyun hsusb2_power: hsusb2_power_reg { 84*4882a593Smuzhiyun compatible = "regulator-fixed"; 85*4882a593Smuzhiyun regulator-name = "hsusb2_vbus"; 86*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 87*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 88*4882a593Smuzhiyun gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */ 89*4882a593Smuzhiyun startup-delay-us = <70000>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* HS USB Host PHY on PORT 2 */ 93*4882a593Smuzhiyun hsusb2_phy: hsusb2_phy { 94*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 95*4882a593Smuzhiyun reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ 96*4882a593Smuzhiyun vcc-supply = <&hsusb2_power>; 97*4882a593Smuzhiyun #phy-cells = <0>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun tfp410: encoder0 { 101*4882a593Smuzhiyun compatible = "ti,tfp410"; 102*4882a593Smuzhiyun powerdown-gpios = <&twl_gpio 2 GPIO_ACTIVE_LOW>; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* XXX pinctrl from twl */ 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun ports { 107*4882a593Smuzhiyun #address-cells = <1>; 108*4882a593Smuzhiyun #size-cells = <0>; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun port@0 { 111*4882a593Smuzhiyun reg = <0>; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun tfp410_in: endpoint { 114*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun port@1 { 119*4882a593Smuzhiyun reg = <1>; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun tfp410_out: endpoint { 122*4882a593Smuzhiyun remote-endpoint = <&dvi_connector_in>; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun dvi0: connector0 { 129*4882a593Smuzhiyun compatible = "dvi-connector"; 130*4882a593Smuzhiyun label = "dvi"; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun digital; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun ddc-i2c-bus = <&i2c3>; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun port { 137*4882a593Smuzhiyun dvi_connector_in: endpoint { 138*4882a593Smuzhiyun remote-endpoint = <&tfp410_out>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun tv0: connector1 { 144*4882a593Smuzhiyun compatible = "svideo-connector"; 145*4882a593Smuzhiyun label = "tv"; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun port { 148*4882a593Smuzhiyun tv_connector_in: endpoint { 149*4882a593Smuzhiyun remote-endpoint = <&venc_out>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun etb@5401b000 { 155*4882a593Smuzhiyun compatible = "arm,coresight-etb10", "arm,primecell"; 156*4882a593Smuzhiyun reg = <0x5401b000 0x1000>; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun clocks = <&emu_src_ck>; 159*4882a593Smuzhiyun clock-names = "apb_pclk"; 160*4882a593Smuzhiyun in-ports { 161*4882a593Smuzhiyun port { 162*4882a593Smuzhiyun etb_in: endpoint { 163*4882a593Smuzhiyun remote-endpoint = <&etm_out>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun etm@54010000 { 170*4882a593Smuzhiyun compatible = "arm,coresight-etm3x", "arm,primecell"; 171*4882a593Smuzhiyun reg = <0x54010000 0x1000>; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun clocks = <&emu_src_ck>; 174*4882a593Smuzhiyun clock-names = "apb_pclk"; 175*4882a593Smuzhiyun out-ports { 176*4882a593Smuzhiyun port { 177*4882a593Smuzhiyun etm_out: endpoint { 178*4882a593Smuzhiyun remote-endpoint = <&etb_in>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun}; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun&omap3_pmx_wkup { 186*4882a593Smuzhiyun gpio1_pins: pinmux_gpio1_pins { 187*4882a593Smuzhiyun pinctrl-single,pins = < 188*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a0e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */ 189*4882a593Smuzhiyun >; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun dss_dpi_pins2: pinmux_dss_dpi_pins1 { 193*4882a593Smuzhiyun pinctrl-single,pins = < 194*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a0a, PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */ 195*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */ 196*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */ 197*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */ 198*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */ 199*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */ 200*4882a593Smuzhiyun >; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun}; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun&omap3_pmx_core { 205*4882a593Smuzhiyun pinctrl-names = "default"; 206*4882a593Smuzhiyun pinctrl-0 = < 207*4882a593Smuzhiyun &hsusb2_pins 208*4882a593Smuzhiyun >; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun uart3_pins: pinmux_uart3_pins { 211*4882a593Smuzhiyun pinctrl-single,pins = < 212*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ 213*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ 214*4882a593Smuzhiyun >; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun hsusb2_pins: pinmux_hsusb2_pins { 218*4882a593Smuzhiyun pinctrl-single,pins = < 219*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ 220*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ 221*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ 222*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ 223*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ 224*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ 225*4882a593Smuzhiyun >; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun dss_dpi_pins1: pinmux_dss_dpi_pins2 { 229*4882a593Smuzhiyun pinctrl-single,pins = < 230*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 231*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 232*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 233*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 236*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 237*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 238*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 239*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 240*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 241*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 242*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 243*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 244*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 245*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ 246*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */ 249*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */ 250*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */ 251*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */ 252*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */ 253*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */ 254*4882a593Smuzhiyun >; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun}; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun&omap3_pmx_core2 { 259*4882a593Smuzhiyun pinctrl-names = "default"; 260*4882a593Smuzhiyun pinctrl-0 = < 261*4882a593Smuzhiyun &hsusb2_2_pins 262*4882a593Smuzhiyun >; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun hsusb2_2_pins: pinmux_hsusb2_2_pins { 265*4882a593Smuzhiyun pinctrl-single,pins = < 266*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ 267*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ 268*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ 269*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ 270*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ 271*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ 272*4882a593Smuzhiyun >; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun}; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun&i2c1 { 277*4882a593Smuzhiyun clock-frequency = <2600000>; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun twl: twl@48 { 280*4882a593Smuzhiyun reg = <0x48>; 281*4882a593Smuzhiyun interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 282*4882a593Smuzhiyun interrupt-parent = <&intc>; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun clocks = <&hfclk_26m>; 285*4882a593Smuzhiyun clock-names = "fck"; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun twl_audio: audio { 288*4882a593Smuzhiyun compatible = "ti,twl4030-audio"; 289*4882a593Smuzhiyun codec { 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun }; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun twl_power: power { 294*4882a593Smuzhiyun compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off"; 295*4882a593Smuzhiyun ti,use_poweroff; 296*4882a593Smuzhiyun }; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun}; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun#include "twl4030.dtsi" 301*4882a593Smuzhiyun#include "twl4030_omap3.dtsi" 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun&i2c2 { 304*4882a593Smuzhiyun clock-frequency = <400000>; 305*4882a593Smuzhiyun}; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun&i2c3 { 308*4882a593Smuzhiyun clock-frequency = <100000>; 309*4882a593Smuzhiyun}; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun&mmc1 { 312*4882a593Smuzhiyun vmmc-supply = <&vmmc1>; 313*4882a593Smuzhiyun vqmmc-supply = <&vsim>; 314*4882a593Smuzhiyun bus-width = <8>; 315*4882a593Smuzhiyun}; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun&mmc2 { 318*4882a593Smuzhiyun status = "disabled"; 319*4882a593Smuzhiyun}; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun&mmc3 { 322*4882a593Smuzhiyun status = "disabled"; 323*4882a593Smuzhiyun}; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun&twl_gpio { 326*4882a593Smuzhiyun ti,use-leds; 327*4882a593Smuzhiyun /* pullups: BIT(1) */ 328*4882a593Smuzhiyun ti,pullups = <0x000002>; 329*4882a593Smuzhiyun /* 330*4882a593Smuzhiyun * pulldowns: 331*4882a593Smuzhiyun * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13) 332*4882a593Smuzhiyun * BIT(15), BIT(16), BIT(17) 333*4882a593Smuzhiyun */ 334*4882a593Smuzhiyun ti,pulldowns = <0x03a1c4>; 335*4882a593Smuzhiyun}; 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun&usb_otg_hs { 338*4882a593Smuzhiyun interface-type = <0>; 339*4882a593Smuzhiyun usb-phy = <&usb2_phy>; 340*4882a593Smuzhiyun phys = <&usb2_phy>; 341*4882a593Smuzhiyun phy-names = "usb2-phy"; 342*4882a593Smuzhiyun mode = <3>; 343*4882a593Smuzhiyun power = <50>; 344*4882a593Smuzhiyun}; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun&uart3 { 347*4882a593Smuzhiyun interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; 348*4882a593Smuzhiyun pinctrl-names = "default"; 349*4882a593Smuzhiyun pinctrl-0 = <&uart3_pins>; 350*4882a593Smuzhiyun}; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun&gpio1 { 353*4882a593Smuzhiyun pinctrl-names = "default"; 354*4882a593Smuzhiyun pinctrl-0 = <&gpio1_pins>; 355*4882a593Smuzhiyun}; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun&usbhshost { 358*4882a593Smuzhiyun port2-mode = "ehci-phy"; 359*4882a593Smuzhiyun}; 360*4882a593Smuzhiyun 361*4882a593Smuzhiyun&usbhsehci { 362*4882a593Smuzhiyun phys = <0 &hsusb2_phy>; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun #address-cells = <1>; 365*4882a593Smuzhiyun #size-cells = <0>; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun hub@2 { 368*4882a593Smuzhiyun compatible = "usb424,9514"; 369*4882a593Smuzhiyun reg = <2>; 370*4882a593Smuzhiyun #address-cells = <1>; 371*4882a593Smuzhiyun #size-cells = <0>; 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun ethernet: usbether@1 { 374*4882a593Smuzhiyun compatible = "usb424,ec00"; 375*4882a593Smuzhiyun reg = <1>; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun }; 378*4882a593Smuzhiyun}; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun&vaux2 { 381*4882a593Smuzhiyun regulator-name = "usb_1v8"; 382*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 383*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 384*4882a593Smuzhiyun regulator-always-on; 385*4882a593Smuzhiyun}; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun&mcbsp2 { 388*4882a593Smuzhiyun status = "okay"; 389*4882a593Smuzhiyun}; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun&dss { 392*4882a593Smuzhiyun status = "okay"; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun pinctrl-names = "default"; 395*4882a593Smuzhiyun pinctrl-0 = < 396*4882a593Smuzhiyun &dss_dpi_pins1 397*4882a593Smuzhiyun &dss_dpi_pins2 398*4882a593Smuzhiyun >; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun port { 401*4882a593Smuzhiyun dpi_out: endpoint { 402*4882a593Smuzhiyun remote-endpoint = <&tfp410_in>; 403*4882a593Smuzhiyun data-lines = <24>; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun}; 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun&venc { 409*4882a593Smuzhiyun status = "okay"; 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun vdda-supply = <&vdac>; 412*4882a593Smuzhiyun 413*4882a593Smuzhiyun port { 414*4882a593Smuzhiyun venc_out: endpoint { 415*4882a593Smuzhiyun remote-endpoint = <&tv_connector_in>; 416*4882a593Smuzhiyun ti,channels = <2>; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun}; 420