1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "omap2430.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "TI OMAP2430 SDP"; 11*4882a593Smuzhiyun compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun memory@80000000 { 14*4882a593Smuzhiyun device_type = "memory"; 15*4882a593Smuzhiyun reg = <0x80000000 0x8000000>; /* 128 MB */ 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun}; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun&i2c2 { 20*4882a593Smuzhiyun clock-frequency = <100000>; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun twl: twl@48 { 23*4882a593Smuzhiyun reg = <0x48>; 24*4882a593Smuzhiyun interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun}; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun#include "twl4030.dtsi" 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun&mmc1 { 31*4882a593Smuzhiyun vmmc-supply = <&vmmc1>; 32*4882a593Smuzhiyun bus-width = <4>; 33*4882a593Smuzhiyun}; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun&gpmc { 36*4882a593Smuzhiyun ranges = <5 0 0x08000000 0x01000000>; 37*4882a593Smuzhiyun ethernet@gpmc { 38*4882a593Smuzhiyun compatible = "smsc,lan91c94"; 39*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 40*4882a593Smuzhiyun interrupts = <21 IRQ_TYPE_LEVEL_LOW>; /* gpio149 */ 41*4882a593Smuzhiyun reg = <5 0x300 0xf>; 42*4882a593Smuzhiyun bank-width = <2>; 43*4882a593Smuzhiyun gpmc,sync-clk-ps = <0>; 44*4882a593Smuzhiyun gpmc,mux-add-data = <2>; 45*4882a593Smuzhiyun gpmc,device-width = <1>; 46*4882a593Smuzhiyun gpmc,cycle2cycle-samecsen = <1>; 47*4882a593Smuzhiyun gpmc,cycle2cycle-diffcsen = <1>; 48*4882a593Smuzhiyun gpmc,cs-on-ns = <6>; 49*4882a593Smuzhiyun gpmc,cs-rd-off-ns = <187>; 50*4882a593Smuzhiyun gpmc,cs-wr-off-ns = <187>; 51*4882a593Smuzhiyun gpmc,adv-on-ns = <18>; 52*4882a593Smuzhiyun gpmc,adv-rd-off-ns = <48>; 53*4882a593Smuzhiyun gpmc,adv-wr-off-ns = <48>; 54*4882a593Smuzhiyun gpmc,oe-on-ns = <60>; 55*4882a593Smuzhiyun gpmc,oe-off-ns = <169>; 56*4882a593Smuzhiyun gpmc,we-on-ns = <66>; 57*4882a593Smuzhiyun gpmc,we-off-ns = <169>; 58*4882a593Smuzhiyun gpmc,rd-cycle-ns = <187>; 59*4882a593Smuzhiyun gpmc,wr-cycle-ns = <187>; 60*4882a593Smuzhiyun gpmc,access-ns = <187>; 61*4882a593Smuzhiyun gpmc,page-burst-access-ns = <24>; 62*4882a593Smuzhiyun gpmc,bus-turnaround-ns = <24>; 63*4882a593Smuzhiyun gpmc,cycle2cycle-delay-ns = <24>; 64*4882a593Smuzhiyun gpmc,wait-monitoring-ns = <0>; 65*4882a593Smuzhiyun gpmc,clk-activation-ns = <0>; 66*4882a593Smuzhiyun gpmc,wr-data-mux-bus-ns = <0>; 67*4882a593Smuzhiyun gpmc,wr-access-ns = <0>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun}; 70*4882a593Smuzhiyun 71