1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include "omap2420-n8x0-common.dtsi" 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/ { 7*4882a593Smuzhiyun model = "Nokia N810"; 8*4882a593Smuzhiyun compatible = "nokia,n810", "nokia,n8x0", "ti,omap2420", "ti,omap2"; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun vio_ape: vio_ape { 11*4882a593Smuzhiyun compatible = "regulator-fixed"; 12*4882a593Smuzhiyun regulator-name = "vio_ape"; 13*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 14*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun v28_aic: v28_aic { 18*4882a593Smuzhiyun compatible = "regulator-fixed"; 19*4882a593Smuzhiyun regulator-name = "v28_aic"; 20*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 21*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun}; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun&omap2420_pmx { 26*4882a593Smuzhiyun mcbsp2_pins: mcbsp2_pins { 27*4882a593Smuzhiyun pinctrl-single,pins = < 28*4882a593Smuzhiyun OMAP2420_CORE_IOPAD(0x0124, PIN_INPUT | MUX_MODE1) /* eac_ac_sclk.mcbsp2_clkx */ 29*4882a593Smuzhiyun OMAP2420_CORE_IOPAD(0x0125, PIN_INPUT | MUX_MODE1) /* eac_ac_fs.mcbsp2_fsx */ 30*4882a593Smuzhiyun OMAP2420_CORE_IOPAD(0x0126, PIN_INPUT | MUX_MODE1) /* eac_ac_din.mcbsp2_dr */ 31*4882a593Smuzhiyun OMAP2420_CORE_IOPAD(0x0127, PIN_OUTPUT | MUX_MODE1) /* eac_ac_dout.mcbsp2_dx */ 32*4882a593Smuzhiyun >; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun aic33_pins: aic33_pins { 36*4882a593Smuzhiyun pinctrl-single,pins = < 37*4882a593Smuzhiyun OMAP2420_CORE_IOPAD(0x0129, PIN_OUTPUT | MUX_MODE3) /* eac_ac_rst.gpio118 */ 38*4882a593Smuzhiyun OMAP2420_CORE_IOPAD(0x00e8, PIN_OUTPUT | MUX_MODE2) /* vlynq_tx1.sys_clkout2 */ 39*4882a593Smuzhiyun >; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&i2c2 { 44*4882a593Smuzhiyun aic33@18 { 45*4882a593Smuzhiyun compatible = "ti,tlv320aic33"; 46*4882a593Smuzhiyun reg = <0x18>; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun pinctrl-names = "default"; 49*4882a593Smuzhiyun pinctrl-0 = <&aic33_pins>; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; /* gpio118 */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun ai3x-gpio-func = < 54*4882a593Smuzhiyun 10 /* AIC3X_GPIO1_FUNC_DIGITAL_MIC_MODCLK */ 55*4882a593Smuzhiyun 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ 56*4882a593Smuzhiyun >; 57*4882a593Smuzhiyun ai3x-micbias-vg = <1>; /* 2V */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun AVDD-supply = <&v28_aic>; 60*4882a593Smuzhiyun DRVDD-supply = <&v28_aic>; 61*4882a593Smuzhiyun IOVDD-supply = <&vio_ape>; 62*4882a593Smuzhiyun DVDD-supply = <&vio_ape>; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun assigned-clocks = <&sys_clkout2_src>, <&sys_clkout2>; 65*4882a593Smuzhiyun assigned-clock-parents = <&func_96m_ck>; 66*4882a593Smuzhiyun assigned-clock-rates = <0>, <12000000>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun}; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun&mcbsp2 { 71*4882a593Smuzhiyun pinctrl-names = "default"; 72*4882a593Smuzhiyun pinctrl-0 = <&mcbsp2_pins>; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun}; 76