1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Common features on the Zoom debug board 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "omap-gpmc-smsc911x.dtsi" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun&gpmc { 9*4882a593Smuzhiyun ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */ 10*4882a593Smuzhiyun <7 0 0x2c000000 0x01000000>; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* 13*4882a593Smuzhiyun * Four port TL16CP754C serial port on GPMC, 14*4882a593Smuzhiyun * they probably share the same GPIO IRQ 15*4882a593Smuzhiyun * REVISIT: Add timing support from slls644g.pdf 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun uart@3,0 { 18*4882a593Smuzhiyun compatible = "ns16550a"; 19*4882a593Smuzhiyun reg = <3 0 8>; /* CS3, offset 0, IO size 8 */ 20*4882a593Smuzhiyun bank-width = <2>; 21*4882a593Smuzhiyun reg-shift = <1>; 22*4882a593Smuzhiyun reg-io-width = <1>; 23*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 24*4882a593Smuzhiyun interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */ 25*4882a593Smuzhiyun clock-frequency = <1843200>; 26*4882a593Smuzhiyun current-speed = <115200>; 27*4882a593Smuzhiyun gpmc,mux-add-data = <0>; 28*4882a593Smuzhiyun gpmc,device-width = <1>; 29*4882a593Smuzhiyun gpmc,wait-pin = <1>; 30*4882a593Smuzhiyun gpmc,cycle2cycle-samecsen = <1>; 31*4882a593Smuzhiyun gpmc,cycle2cycle-diffcsen = <1>; 32*4882a593Smuzhiyun gpmc,cs-on-ns = <5>; 33*4882a593Smuzhiyun gpmc,cs-rd-off-ns = <155>; 34*4882a593Smuzhiyun gpmc,cs-wr-off-ns = <155>; 35*4882a593Smuzhiyun gpmc,adv-on-ns = <15>; 36*4882a593Smuzhiyun gpmc,adv-rd-off-ns = <40>; 37*4882a593Smuzhiyun gpmc,adv-wr-off-ns = <40>; 38*4882a593Smuzhiyun gpmc,oe-on-ns = <45>; 39*4882a593Smuzhiyun gpmc,oe-off-ns = <145>; 40*4882a593Smuzhiyun gpmc,we-on-ns = <45>; 41*4882a593Smuzhiyun gpmc,we-off-ns = <145>; 42*4882a593Smuzhiyun gpmc,rd-cycle-ns = <155>; 43*4882a593Smuzhiyun gpmc,wr-cycle-ns = <155>; 44*4882a593Smuzhiyun gpmc,access-ns = <145>; 45*4882a593Smuzhiyun gpmc,page-burst-access-ns = <20>; 46*4882a593Smuzhiyun gpmc,bus-turnaround-ns = <20>; 47*4882a593Smuzhiyun gpmc,cycle2cycle-delay-ns = <20>; 48*4882a593Smuzhiyun gpmc,wait-monitoring-ns = <0>; 49*4882a593Smuzhiyun gpmc,clk-activation-ns = <0>; 50*4882a593Smuzhiyun gpmc,wr-data-mux-bus-ns = <45>; 51*4882a593Smuzhiyun gpmc,wr-access-ns = <145>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun uart@3,1 { 54*4882a593Smuzhiyun compatible = "ns16550a"; 55*4882a593Smuzhiyun reg = <3 0x100 8>; /* CS3, offset 0x100, IO size 8 */ 56*4882a593Smuzhiyun bank-width = <2>; 57*4882a593Smuzhiyun reg-shift = <1>; 58*4882a593Smuzhiyun reg-io-width = <1>; 59*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 60*4882a593Smuzhiyun interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */ 61*4882a593Smuzhiyun clock-frequency = <1843200>; 62*4882a593Smuzhiyun current-speed = <115200>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun uart@3,2 { 65*4882a593Smuzhiyun compatible = "ns16550a"; 66*4882a593Smuzhiyun reg = <3 0x200 8>; /* CS3, offset 0x200, IO size 8 */ 67*4882a593Smuzhiyun bank-width = <2>; 68*4882a593Smuzhiyun reg-shift = <1>; 69*4882a593Smuzhiyun reg-io-width = <1>; 70*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 71*4882a593Smuzhiyun interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */ 72*4882a593Smuzhiyun clock-frequency = <1843200>; 73*4882a593Smuzhiyun current-speed = <115200>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun uart@3,3 { 76*4882a593Smuzhiyun compatible = "ns16550a"; 77*4882a593Smuzhiyun reg = <3 0x300 8>; /* CS3, offset 0x300, IO size 8 */ 78*4882a593Smuzhiyun bank-width = <2>; 79*4882a593Smuzhiyun reg-shift = <1>; 80*4882a593Smuzhiyun reg-io-width = <1>; 81*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 82*4882a593Smuzhiyun interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */ 83*4882a593Smuzhiyun clock-frequency = <1843200>; 84*4882a593Smuzhiyun current-speed = <115200>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun ethernet@gpmc { 88*4882a593Smuzhiyun reg = <7 0 0xff>; 89*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 90*4882a593Smuzhiyun interrupts = <30 IRQ_TYPE_LEVEL_LOW>; /* gpio158 */ 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun}; 93