1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * linux/arch/arm/boot/nspire-classic.dts 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/include/ "nspire.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun&lcd { 11*4882a593Smuzhiyun port { 12*4882a593Smuzhiyun clcd_pads: endpoint { 13*4882a593Smuzhiyun remote-endpoint = <&panel_in>; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun}; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun&fast_timer { 19*4882a593Smuzhiyun /* compatible = "lsi,zevio-timer"; */ 20*4882a593Smuzhiyun reg = <0x90010000 0x1000>, <0x900A0010 0x8>; 21*4882a593Smuzhiyun}; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun&uart { 24*4882a593Smuzhiyun compatible = "ns16550"; 25*4882a593Smuzhiyun reg-shift = <2>; 26*4882a593Smuzhiyun reg-io-width = <4>; 27*4882a593Smuzhiyun clocks = <&apb_pclk>; 28*4882a593Smuzhiyun no-loopback-test; 29*4882a593Smuzhiyun}; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun&timer0 { 32*4882a593Smuzhiyun /* compatible = "lsi,zevio-timer"; */ 33*4882a593Smuzhiyun reg = <0x900C0000 0x1000>, <0x900A0018 0x8>; 34*4882a593Smuzhiyun}; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun&timer1 { 37*4882a593Smuzhiyun compatible = "lsi,zevio-timer"; 38*4882a593Smuzhiyun reg = <0x900D0000 0x1000>, <0x900A0020 0x8>; 39*4882a593Smuzhiyun}; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun&keypad { 42*4882a593Smuzhiyun active-low; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&base_clk { 47*4882a593Smuzhiyun compatible = "lsi,nspire-classic-clock"; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&ahb_clk { 51*4882a593Smuzhiyun compatible = "lsi,nspire-classic-ahb-divider"; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun&vbus_reg { 56*4882a593Smuzhiyun gpio = <&gpio 5 0>; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun/ { 60*4882a593Smuzhiyun memory { 61*4882a593Smuzhiyun device_type = "memory"; 62*4882a593Smuzhiyun reg = <0x10000000 0x2000000>; /* 32 MB */ 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun ahb { 66*4882a593Smuzhiyun #address-cells = <1>; 67*4882a593Smuzhiyun #size-cells = <1>; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun intc: interrupt-controller@DC000000 { 70*4882a593Smuzhiyun compatible = "lsi,zevio-intc"; 71*4882a593Smuzhiyun interrupt-controller; 72*4882a593Smuzhiyun reg = <0xDC000000 0x1000>; 73*4882a593Smuzhiyun #interrupt-cells = <1>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun panel { 78*4882a593Smuzhiyun compatible = "ti,nspire-classic-lcd-panel"; 79*4882a593Smuzhiyun port { 80*4882a593Smuzhiyun panel_in: endpoint { 81*4882a593Smuzhiyun remote-endpoint = <&clcd_pads>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun chosen { 86*4882a593Smuzhiyun bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0"; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun}; 89