1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017-2018 MediaTek Inc. 4*4882a593Smuzhiyun * Author: Sean Wang <sean.wang@mediatek.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include <dt-bindings/power/mt7623a-power.h> 10*4882a593Smuzhiyun#include "mt7623.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun&afe { 13*4882a593Smuzhiyun power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>; 14*4882a593Smuzhiyun}; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun&crypto { 17*4882a593Smuzhiyun power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>; 18*4882a593Smuzhiyun}; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunð { 21*4882a593Smuzhiyun power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun&nandc { 25*4882a593Smuzhiyun power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>; 26*4882a593Smuzhiyun}; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun&pcie { 29*4882a593Smuzhiyun power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&scpsys { 33*4882a593Smuzhiyun compatible = "mediatek,mt7623a-scpsys"; 34*4882a593Smuzhiyun clocks = <&topckgen CLK_TOP_ETHIF_SEL>; 35*4882a593Smuzhiyun clock-names = "ethif"; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun&usb1 { 39*4882a593Smuzhiyun power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; 40*4882a593Smuzhiyun}; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun&usb2 { 43*4882a593Smuzhiyun power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>; 44*4882a593Smuzhiyun}; 45