xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/mt7623a-rfb-emmc.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2017-2018 MediaTek Inc.
4*4882a593Smuzhiyun * Author: Sean Wang <sean.wang@mediatek.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
10*4882a593Smuzhiyun#include "mt7623a.dtsi"
11*4882a593Smuzhiyun#include "mt6323.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "MediaTek MT7623A with eMMC reference board";
15*4882a593Smuzhiyun	compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	aliases {
18*4882a593Smuzhiyun		serial2 = &uart2;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	chosen {
22*4882a593Smuzhiyun		stdout-path = "serial2:115200n8";
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	cpus {
26*4882a593Smuzhiyun		cpu@0 {
27*4882a593Smuzhiyun			proc-supply = <&mt6323_vproc_reg>;
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		cpu@1 {
31*4882a593Smuzhiyun			proc-supply = <&mt6323_vproc_reg>;
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		cpu@2 {
35*4882a593Smuzhiyun			proc-supply = <&mt6323_vproc_reg>;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		cpu@3 {
39*4882a593Smuzhiyun			proc-supply = <&mt6323_vproc_reg>;
40*4882a593Smuzhiyun		};
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	gpio-keys {
44*4882a593Smuzhiyun		compatible = "gpio-keys";
45*4882a593Smuzhiyun		pinctrl-names = "default";
46*4882a593Smuzhiyun		pinctrl-0 = <&key_pins_a>;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		factory {
49*4882a593Smuzhiyun			label = "factory";
50*4882a593Smuzhiyun			linux,code = <BTN_0>;
51*4882a593Smuzhiyun			gpios = <&pio 256 GPIO_ACTIVE_LOW>;
52*4882a593Smuzhiyun		};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		wps {
55*4882a593Smuzhiyun			label = "wps";
56*4882a593Smuzhiyun			linux,code = <KEY_WPS_BUTTON>;
57*4882a593Smuzhiyun			gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	memory@80000000 {
62*4882a593Smuzhiyun		device_type = "memory";
63*4882a593Smuzhiyun		reg = <0 0x80000000 0 0x20000000>;
64*4882a593Smuzhiyun	};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	reg_1p8v: regulator-1p8v {
67*4882a593Smuzhiyun		compatible = "regulator-fixed";
68*4882a593Smuzhiyun		regulator-name = "fixed-1.8V";
69*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
70*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
71*4882a593Smuzhiyun		regulator-boot-on;
72*4882a593Smuzhiyun		regulator-always-on;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	reg_3p3v: regulator-3p3v {
76*4882a593Smuzhiyun		compatible = "regulator-fixed";
77*4882a593Smuzhiyun		regulator-name = "fixed-3.3V";
78*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
79*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
80*4882a593Smuzhiyun		regulator-boot-on;
81*4882a593Smuzhiyun		regulator-always-on;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	reg_5v: regulator-5v {
85*4882a593Smuzhiyun		compatible = "regulator-fixed";
86*4882a593Smuzhiyun		regulator-name = "fixed-5V";
87*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
88*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
89*4882a593Smuzhiyun		regulator-boot-on;
90*4882a593Smuzhiyun		regulator-always-on;
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	sound {
94*4882a593Smuzhiyun		compatible = "mediatek,mt2701-wm8960-machine";
95*4882a593Smuzhiyun		mediatek,platform = <&afe>;
96*4882a593Smuzhiyun		audio-routing =
97*4882a593Smuzhiyun			"Headphone", "HP_L",
98*4882a593Smuzhiyun			"Headphone", "HP_R",
99*4882a593Smuzhiyun			"LINPUT1", "AMIC",
100*4882a593Smuzhiyun			"RINPUT1", "AMIC";
101*4882a593Smuzhiyun		mediatek,audio-codec = <&wm8960>;
102*4882a593Smuzhiyun		pinctrl-names = "default";
103*4882a593Smuzhiyun		pinctrl-0 = <&i2s0_pins_a>;
104*4882a593Smuzhiyun	};
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun&btif {
108*4882a593Smuzhiyun	status = "okay";
109*4882a593Smuzhiyun};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun&crypto {
112*4882a593Smuzhiyun	status = "okay";
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun&eth {
116*4882a593Smuzhiyun	status = "okay";
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	gmac0: mac@0 {
119*4882a593Smuzhiyun		compatible = "mediatek,eth-mac";
120*4882a593Smuzhiyun		reg = <0>;
121*4882a593Smuzhiyun		phy-mode = "trgmii";
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		fixed-link {
124*4882a593Smuzhiyun			speed = <1000>;
125*4882a593Smuzhiyun			full-duplex;
126*4882a593Smuzhiyun			pause;
127*4882a593Smuzhiyun		};
128*4882a593Smuzhiyun	};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun	mdio-bus {
131*4882a593Smuzhiyun		#address-cells = <1>;
132*4882a593Smuzhiyun		#size-cells = <0>;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun		switch@0 {
135*4882a593Smuzhiyun			compatible = "mediatek,mt7530";
136*4882a593Smuzhiyun			reg = <0>;
137*4882a593Smuzhiyun			mediatek,mcm;
138*4882a593Smuzhiyun			resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
139*4882a593Smuzhiyun			reset-names = "mcm";
140*4882a593Smuzhiyun			core-supply = <&mt6323_vpa_reg>;
141*4882a593Smuzhiyun			io-supply = <&mt6323_vemc3v3_reg>;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun			ports {
144*4882a593Smuzhiyun				#address-cells = <1>;
145*4882a593Smuzhiyun				#size-cells = <0>;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun				port@0 {
148*4882a593Smuzhiyun					reg = <0>;
149*4882a593Smuzhiyun					label = "lan0";
150*4882a593Smuzhiyun				};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun				port@1 {
153*4882a593Smuzhiyun					reg = <1>;
154*4882a593Smuzhiyun					label = "lan1";
155*4882a593Smuzhiyun				};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun				port@2 {
158*4882a593Smuzhiyun					reg = <2>;
159*4882a593Smuzhiyun					label = "lan2";
160*4882a593Smuzhiyun				};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun				port@3 {
163*4882a593Smuzhiyun					reg = <3>;
164*4882a593Smuzhiyun					label = "lan3";
165*4882a593Smuzhiyun				};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun				port@4 {
168*4882a593Smuzhiyun					reg = <4>;
169*4882a593Smuzhiyun					label = "wan";
170*4882a593Smuzhiyun				};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun				port@6 {
173*4882a593Smuzhiyun					reg = <6>;
174*4882a593Smuzhiyun					label = "cpu";
175*4882a593Smuzhiyun					ethernet = <&gmac0>;
176*4882a593Smuzhiyun					phy-mode = "trgmii";
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun					fixed-link {
179*4882a593Smuzhiyun						speed = <1000>;
180*4882a593Smuzhiyun						full-duplex;
181*4882a593Smuzhiyun					};
182*4882a593Smuzhiyun				};
183*4882a593Smuzhiyun			};
184*4882a593Smuzhiyun		};
185*4882a593Smuzhiyun	};
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun&i2c0 {
189*4882a593Smuzhiyun	pinctrl-names = "default";
190*4882a593Smuzhiyun	pinctrl-0 = <&i2c0_pins_a>;
191*4882a593Smuzhiyun	status = "okay";
192*4882a593Smuzhiyun};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun&i2c1 {
195*4882a593Smuzhiyun	pinctrl-names = "default";
196*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_pins_b>;
197*4882a593Smuzhiyun	status = "okay";
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun	wm8960: wm8960@1a {
200*4882a593Smuzhiyun		compatible = "wlf,wm8960";
201*4882a593Smuzhiyun		reg = <0x1a>;
202*4882a593Smuzhiyun	};
203*4882a593Smuzhiyun};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun&i2c2 {
206*4882a593Smuzhiyun	pinctrl-names = "default";
207*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins_b>;
208*4882a593Smuzhiyun	status = "okay";
209*4882a593Smuzhiyun};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun&mmc0 {
212*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
213*4882a593Smuzhiyun	pinctrl-0 = <&mmc0_pins_default>;
214*4882a593Smuzhiyun	pinctrl-1 = <&mmc0_pins_uhs>;
215*4882a593Smuzhiyun	status = "okay";
216*4882a593Smuzhiyun	bus-width = <8>;
217*4882a593Smuzhiyun	max-frequency = <50000000>;
218*4882a593Smuzhiyun	cap-mmc-highspeed;
219*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
220*4882a593Smuzhiyun	vqmmc-supply = <&reg_1p8v>;
221*4882a593Smuzhiyun	non-removable;
222*4882a593Smuzhiyun};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun&mmc1 {
225*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
226*4882a593Smuzhiyun	pinctrl-0 = <&mmc1_pins_default>;
227*4882a593Smuzhiyun	pinctrl-1 = <&mmc1_pins_uhs>;
228*4882a593Smuzhiyun	status = "okay";
229*4882a593Smuzhiyun	bus-width = <4>;
230*4882a593Smuzhiyun	max-frequency = <50000000>;
231*4882a593Smuzhiyun	cap-sd-highspeed;
232*4882a593Smuzhiyun	cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
233*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
234*4882a593Smuzhiyun	vqmmc-supply = <&reg_3p3v>;
235*4882a593Smuzhiyun};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun&pcie {
238*4882a593Smuzhiyun	pinctrl-names = "default";
239*4882a593Smuzhiyun	pinctrl-0 = <&pcie_default>;
240*4882a593Smuzhiyun	status = "okay";
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun	pcie@0,0 {
243*4882a593Smuzhiyun		status = "okay";
244*4882a593Smuzhiyun	};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun	pcie@1,0 {
247*4882a593Smuzhiyun		status = "okay";
248*4882a593Smuzhiyun	};
249*4882a593Smuzhiyun};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun&pcie0_phy {
252*4882a593Smuzhiyun	status = "okay";
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&pcie1_phy {
256*4882a593Smuzhiyun	status = "okay";
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&pwm {
260*4882a593Smuzhiyun	pinctrl-names = "default";
261*4882a593Smuzhiyun	pinctrl-0 = <&pwm_pins_a>;
262*4882a593Smuzhiyun	status = "okay";
263*4882a593Smuzhiyun};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun&spi0 {
266*4882a593Smuzhiyun	pinctrl-names = "default";
267*4882a593Smuzhiyun	pinctrl-0 = <&spi0_pins_a>;
268*4882a593Smuzhiyun	status = "okay";
269*4882a593Smuzhiyun};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun&spi1 {
272*4882a593Smuzhiyun	pinctrl-names = "default";
273*4882a593Smuzhiyun	pinctrl-0 = <&spi1_pins_a>;
274*4882a593Smuzhiyun	status = "okay";
275*4882a593Smuzhiyun};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun&uart2 {
278*4882a593Smuzhiyun	pinctrl-names = "default";
279*4882a593Smuzhiyun	pinctrl-0 = <&uart2_pins_b>;
280*4882a593Smuzhiyun	status = "okay";
281*4882a593Smuzhiyun};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun&usb1 {
284*4882a593Smuzhiyun	vusb33-supply = <&reg_3p3v>;
285*4882a593Smuzhiyun	vbus-supply = <&reg_5v>;
286*4882a593Smuzhiyun	status = "okay";
287*4882a593Smuzhiyun};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun&u3phy1 {
290*4882a593Smuzhiyun	status = "okay";
291*4882a593Smuzhiyun};
292