xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/mt2701-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2015 MediaTek Inc.
4*4882a593Smuzhiyun * Author: Erin Lo <erin.lo@mediatek.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include "mt2701.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "MediaTek MT2701 evaluation board";
14*4882a593Smuzhiyun	compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	memory {
17*4882a593Smuzhiyun		device_type = "memory";
18*4882a593Smuzhiyun		reg = <0 0x80000000 0 0x40000000>;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	sound:sound {
22*4882a593Smuzhiyun		compatible = "mediatek,mt2701-cs42448-machine";
23*4882a593Smuzhiyun		mediatek,platform = <&afe>;
24*4882a593Smuzhiyun		/* CS42448 Machine name */
25*4882a593Smuzhiyun		audio-routing =
26*4882a593Smuzhiyun		"Line Out Jack", "AOUT1L",
27*4882a593Smuzhiyun		"Line Out Jack", "AOUT1R",
28*4882a593Smuzhiyun		"Line Out Jack", "AOUT2L",
29*4882a593Smuzhiyun		"Line Out Jack", "AOUT2R",
30*4882a593Smuzhiyun		"Line Out Jack", "AOUT3L",
31*4882a593Smuzhiyun		"Line Out Jack", "AOUT3R",
32*4882a593Smuzhiyun		"Line Out Jack", "AOUT4L",
33*4882a593Smuzhiyun		"Line Out Jack", "AOUT4R",
34*4882a593Smuzhiyun		"AIN1L", "AMIC",
35*4882a593Smuzhiyun		"AIN1R", "AMIC",
36*4882a593Smuzhiyun		"AIN2L", "Tuner In",
37*4882a593Smuzhiyun		"AIN2R", "Tuner In",
38*4882a593Smuzhiyun		"AIN3L", "Satellite Tuner In",
39*4882a593Smuzhiyun		"AIN3R", "Satellite Tuner In",
40*4882a593Smuzhiyun		"AIN3L", "AUX In",
41*4882a593Smuzhiyun		"AIN3R", "AUX In";
42*4882a593Smuzhiyun		mediatek,audio-codec = <&cs42448>;
43*4882a593Smuzhiyun		mediatek,audio-codec-bt-mrg = <&bt_sco_codec>;
44*4882a593Smuzhiyun		pinctrl-names = "default";
45*4882a593Smuzhiyun		pinctrl-0 = <&aud_pins_default>;
46*4882a593Smuzhiyun		i2s1-in-sel-gpio1 = <&pio 53 0>;
47*4882a593Smuzhiyun		i2s1-in-sel-gpio2 = <&pio 54 0>;
48*4882a593Smuzhiyun		status = "okay";
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	bt_sco_codec:bt_sco_codec {
52*4882a593Smuzhiyun		compatible = "linux,bt-sco";
53*4882a593Smuzhiyun	};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	backlight_lcd: backlight_lcd {
56*4882a593Smuzhiyun		compatible = "pwm-backlight";
57*4882a593Smuzhiyun		pwms = <&bls 0 100000>;
58*4882a593Smuzhiyun		brightness-levels = <
59*4882a593Smuzhiyun			  0  16  32  48  64  80  96 112
60*4882a593Smuzhiyun			128 144 160 176 192 208 224 240
61*4882a593Smuzhiyun			255
62*4882a593Smuzhiyun		>;
63*4882a593Smuzhiyun		default-brightness-level = <9>;
64*4882a593Smuzhiyun	};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	usb_vbus: regulator@0 {
67*4882a593Smuzhiyun		compatible = "regulator-fixed";
68*4882a593Smuzhiyun		regulator-name = "usb_vbus";
69*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
70*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
71*4882a593Smuzhiyun		gpio = <&pio 45 GPIO_ACTIVE_HIGH>;
72*4882a593Smuzhiyun		enable-active-high;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun&auxadc {
77*4882a593Smuzhiyun	status = "okay";
78*4882a593Smuzhiyun};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun&bls {
81*4882a593Smuzhiyun	status = "okay";
82*4882a593Smuzhiyun	pinctrl-names = "default";
83*4882a593Smuzhiyun	pinctrl-0 = <&pwm_bls_gpio>;
84*4882a593Smuzhiyun};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun&i2c0 {
87*4882a593Smuzhiyun	pinctrl-names = "default";
88*4882a593Smuzhiyun	pinctrl-0 = <&i2c0_pins_a>;
89*4882a593Smuzhiyun	status = "okay";
90*4882a593Smuzhiyun};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun&i2c1 {
93*4882a593Smuzhiyun	pinctrl-names = "default";
94*4882a593Smuzhiyun	pinctrl-0 = <&i2c1_pins_a>;
95*4882a593Smuzhiyun	status = "okay";
96*4882a593Smuzhiyun};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun&i2c2 {
99*4882a593Smuzhiyun	pinctrl-names = "default";
100*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins_a>;
101*4882a593Smuzhiyun	status = "okay";
102*4882a593Smuzhiyun	cs42448: cs42448@48 {
103*4882a593Smuzhiyun		compatible = "cirrus,cs42448";
104*4882a593Smuzhiyun		reg = <0x48>;
105*4882a593Smuzhiyun		clocks = <&topckgen CLK_TOP_AUD_I2S1_MCLK>;
106*4882a593Smuzhiyun		clock-names = "mclk";
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun&pio {
111*4882a593Smuzhiyun	i2c0_pins_a: i2c0@0 {
112*4882a593Smuzhiyun		pins1 {
113*4882a593Smuzhiyun			pinmux = <MT2701_PIN_75_SDA0__FUNC_SDA0>,
114*4882a593Smuzhiyun				 <MT2701_PIN_76_SCL0__FUNC_SCL0>;
115*4882a593Smuzhiyun			bias-disable;
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun	};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun	i2c1_pins_a: i2c1@0 {
120*4882a593Smuzhiyun		pins1 {
121*4882a593Smuzhiyun			pinmux = <MT2701_PIN_57_SDA1__FUNC_SDA1>,
122*4882a593Smuzhiyun				 <MT2701_PIN_58_SCL1__FUNC_SCL1>;
123*4882a593Smuzhiyun			bias-disable;
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun	i2c2_pins_a: i2c2@0 {
128*4882a593Smuzhiyun		pins1 {
129*4882a593Smuzhiyun			pinmux = <MT2701_PIN_77_SDA2__FUNC_SDA2>,
130*4882a593Smuzhiyun				 <MT2701_PIN_78_SCL2__FUNC_SCL2>;
131*4882a593Smuzhiyun			bias-disable;
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	pwm_bls_gpio: pwm_bls_gpio {
136*4882a593Smuzhiyun		pins_cmd_dat {
137*4882a593Smuzhiyun			pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>;
138*4882a593Smuzhiyun		};
139*4882a593Smuzhiyun	};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun	spi_pins_a: spi0@0 {
142*4882a593Smuzhiyun		pins_spi {
143*4882a593Smuzhiyun			pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>,
144*4882a593Smuzhiyun				 <MT2701_PIN_54_SPI0_CK__FUNC_SPI0_CK>,
145*4882a593Smuzhiyun				 <MT2701_PIN_55_SPI0_MI__FUNC_SPI0_MI>,
146*4882a593Smuzhiyun				 <MT2701_PIN_56_SPI0_MO__FUNC_SPI0_MO>;
147*4882a593Smuzhiyun			bias-disable;
148*4882a593Smuzhiyun		};
149*4882a593Smuzhiyun	};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun	aud_pins_default: audiodefault {
152*4882a593Smuzhiyun		pins_cmd_dat {
153*4882a593Smuzhiyun			pinmux = <MT2701_PIN_49_I2S0_DATA__FUNC_I2S0_DATA>,
154*4882a593Smuzhiyun				 <MT2701_PIN_72_I2S0_DATA_IN__FUNC_I2S0_DATA_IN>,
155*4882a593Smuzhiyun				 <MT2701_PIN_73_I2S0_LRCK__FUNC_I2S0_LRCK>,
156*4882a593Smuzhiyun				 <MT2701_PIN_74_I2S0_BCK__FUNC_I2S0_BCK>,
157*4882a593Smuzhiyun				 <MT2701_PIN_126_I2S0_MCLK__FUNC_I2S0_MCLK>,
158*4882a593Smuzhiyun				 <MT2701_PIN_33_I2S1_DATA__FUNC_I2S1_DATA>,
159*4882a593Smuzhiyun				 <MT2701_PIN_34_I2S1_DATA_IN__FUNC_I2S1_DATA_IN>,
160*4882a593Smuzhiyun				 <MT2701_PIN_35_I2S1_BCK__FUNC_I2S1_BCK>,
161*4882a593Smuzhiyun				 <MT2701_PIN_36_I2S1_LRCK__FUNC_I2S1_LRCK>,
162*4882a593Smuzhiyun				 <MT2701_PIN_37_I2S1_MCLK__FUNC_I2S1_MCLK>,
163*4882a593Smuzhiyun				 <MT2701_PIN_203_PWM0__FUNC_I2S2_DATA>,
164*4882a593Smuzhiyun				 <MT2701_PIN_204_PWM1__FUNC_I2S3_DATA>,
165*4882a593Smuzhiyun				 <MT2701_PIN_53_SPI0_CSN__FUNC_GPIO53>,
166*4882a593Smuzhiyun				 <MT2701_PIN_54_SPI0_CK__FUNC_GPIO54>,
167*4882a593Smuzhiyun				 <MT2701_PIN_18_PCM_CLK__FUNC_MRG_CLK>,
168*4882a593Smuzhiyun				 <MT2701_PIN_19_PCM_SYNC__FUNC_MRG_SYNC>,
169*4882a593Smuzhiyun				 <MT2701_PIN_20_PCM_RX__FUNC_MRG_TX>,
170*4882a593Smuzhiyun				 <MT2701_PIN_21_PCM_TX__FUNC_MRG_RX>;
171*4882a593Smuzhiyun			drive-strength = <MTK_DRIVE_12mA>;
172*4882a593Smuzhiyun			bias-pull-down;
173*4882a593Smuzhiyun		};
174*4882a593Smuzhiyun	};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun	spi_pins_b: spi1@0 {
177*4882a593Smuzhiyun		pins_spi {
178*4882a593Smuzhiyun			pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>,
179*4882a593Smuzhiyun				 <MT2701_PIN_8_SPI1_MI__FUNC_SPI1_MI>,
180*4882a593Smuzhiyun				 <MT2701_PIN_9_SPI1_MO__FUNC_SPI1_MO>,
181*4882a593Smuzhiyun				 <MT2701_PIN_199_SPI1_CLK__FUNC_SPI1_CK>;
182*4882a593Smuzhiyun			bias-disable;
183*4882a593Smuzhiyun		};
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun	spi_pins_c: spi2@0 {
187*4882a593Smuzhiyun		pins_spi {
188*4882a593Smuzhiyun			pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>,
189*4882a593Smuzhiyun				 <MT2701_PIN_102_SPI2_MI__FUNC_SPI2_MI>,
190*4882a593Smuzhiyun				 <MT2701_PIN_103_SPI2_MO__FUNC_SPI2_MO>,
191*4882a593Smuzhiyun				 <MT2701_PIN_104_SPI2_CLK__FUNC_SPI2_CK>;
192*4882a593Smuzhiyun			bias-disable;
193*4882a593Smuzhiyun		};
194*4882a593Smuzhiyun	};
195*4882a593Smuzhiyun};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun&spi0 {
198*4882a593Smuzhiyun	pinctrl-names = "default";
199*4882a593Smuzhiyun	pinctrl-0 = <&spi_pins_a>;
200*4882a593Smuzhiyun	status = "disabled";
201*4882a593Smuzhiyun};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun&spi1 {
204*4882a593Smuzhiyun	pinctrl-names = "default";
205*4882a593Smuzhiyun	pinctrl-0 = <&spi_pins_b>;
206*4882a593Smuzhiyun	status = "disabled";
207*4882a593Smuzhiyun};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun&spi2 {
210*4882a593Smuzhiyun	pinctrl-names = "default";
211*4882a593Smuzhiyun	pinctrl-0 = <&spi_pins_c>;
212*4882a593Smuzhiyun	status = "disabled";
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&nor_flash {
216*4882a593Smuzhiyun	pinctrl-names = "default";
217*4882a593Smuzhiyun	pinctrl-0 = <&nor_pins_default>;
218*4882a593Smuzhiyun	status = "okay";
219*4882a593Smuzhiyun	flash@0 {
220*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
221*4882a593Smuzhiyun		reg = <0>;
222*4882a593Smuzhiyun	};
223*4882a593Smuzhiyun};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun&pio {
226*4882a593Smuzhiyun	nor_pins_default: nor {
227*4882a593Smuzhiyun		pins1 {
228*4882a593Smuzhiyun			pinmux = <MT2701_PIN_240_EXT_XCS__FUNC_EXT_XCS>,
229*4882a593Smuzhiyun				 <MT2701_PIN_241_EXT_SCK__FUNC_EXT_SCK>,
230*4882a593Smuzhiyun				 <MT2701_PIN_239_EXT_SDIO0__FUNC_EXT_SDIO0>,
231*4882a593Smuzhiyun				 <MT2701_PIN_238_EXT_SDIO1__FUNC_EXT_SDIO1>,
232*4882a593Smuzhiyun				 <MT2701_PIN_237_EXT_SDIO2__FUNC_EXT_SDIO2>,
233*4882a593Smuzhiyun				 <MT2701_PIN_236_EXT_SDIO3__FUNC_EXT_SDIO3>;
234*4882a593Smuzhiyun			drive-strength = <MTK_DRIVE_4mA>;
235*4882a593Smuzhiyun			bias-pull-up;
236*4882a593Smuzhiyun		};
237*4882a593Smuzhiyun	};
238*4882a593Smuzhiyun};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun&uart0 {
241*4882a593Smuzhiyun	status = "okay";
242*4882a593Smuzhiyun};
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun&usb2 {
245*4882a593Smuzhiyun	status = "okay";
246*4882a593Smuzhiyun	usb-role-switch;
247*4882a593Smuzhiyun	connector{
248*4882a593Smuzhiyun		compatible = "gpio-usb-b-connector", "usb-b-connector";
249*4882a593Smuzhiyun		type = "micro";
250*4882a593Smuzhiyun		id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
251*4882a593Smuzhiyun		vbus-supply = <&usb_vbus>;
252*4882a593Smuzhiyun	};
253*4882a593Smuzhiyun};
254