xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ls1021a-twr.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright 2013-2014 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun * Copyright 2018 NXP
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
6*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
7*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
8*4882a593Smuzhiyun * whole.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
11*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
12*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of
13*4882a593Smuzhiyun *     the License, or (at your option) any later version.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
16*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
17*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18*4882a593Smuzhiyun *     GNU General Public License for more details.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun *     You should have received a copy of the GNU General Public
21*4882a593Smuzhiyun *     License along with this file; if not, write to the Free
22*4882a593Smuzhiyun *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23*4882a593Smuzhiyun *     MA 02110-1301 USA
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * Or, alternatively,
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
28*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
29*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
30*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
31*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
32*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
33*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
34*4882a593Smuzhiyun *     conditions:
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
37*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
40*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
41*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
42*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
43*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
44*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
45*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
46*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
47*4882a593Smuzhiyun */
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun/dts-v1/;
50*4882a593Smuzhiyun#include "ls1021a.dtsi"
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun/ {
53*4882a593Smuzhiyun	model = "LS1021A TWR Board";
54*4882a593Smuzhiyun	compatible = "fsl,ls1021a-twr", "fsl,ls1021a";
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	aliases {
57*4882a593Smuzhiyun		enet2_rgmii_phy = &rgmii_phy1;
58*4882a593Smuzhiyun		enet0_sgmii_phy = &sgmii_phy2;
59*4882a593Smuzhiyun		enet1_sgmii_phy = &sgmii_phy0;
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	sys_mclk: clock-mclk {
63*4882a593Smuzhiyun		compatible = "fixed-clock";
64*4882a593Smuzhiyun		#clock-cells = <0>;
65*4882a593Smuzhiyun		clock-frequency = <24576000>;
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	regulators {
69*4882a593Smuzhiyun		compatible = "simple-bus";
70*4882a593Smuzhiyun		#address-cells = <1>;
71*4882a593Smuzhiyun		#size-cells = <0>;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun		reg_3p3v: regulator@0 {
74*4882a593Smuzhiyun			compatible = "regulator-fixed";
75*4882a593Smuzhiyun			reg = <0>;
76*4882a593Smuzhiyun			regulator-name = "3P3V";
77*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
78*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
79*4882a593Smuzhiyun			regulator-always-on;
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	sound {
84*4882a593Smuzhiyun		compatible = "simple-audio-card";
85*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
86*4882a593Smuzhiyun		simple-audio-card,widgets =
87*4882a593Smuzhiyun			"Microphone", "Microphone Jack",
88*4882a593Smuzhiyun			"Headphone", "Headphone Jack",
89*4882a593Smuzhiyun			"Speaker", "Speaker Ext",
90*4882a593Smuzhiyun			"Line", "Line In Jack";
91*4882a593Smuzhiyun		simple-audio-card,routing =
92*4882a593Smuzhiyun			"MIC_IN", "Microphone Jack",
93*4882a593Smuzhiyun			"Microphone Jack", "Mic Bias",
94*4882a593Smuzhiyun			"LINE_IN", "Line In Jack",
95*4882a593Smuzhiyun			"Headphone Jack", "HP_OUT",
96*4882a593Smuzhiyun			"Speaker Ext", "LINE_OUT";
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun		simple-audio-card,cpu {
99*4882a593Smuzhiyun			sound-dai = <&sai1>;
100*4882a593Smuzhiyun			frame-master;
101*4882a593Smuzhiyun			bitclock-master;
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun		simple-audio-card,codec {
105*4882a593Smuzhiyun			sound-dai = <&codec>;
106*4882a593Smuzhiyun			frame-master;
107*4882a593Smuzhiyun			bitclock-master;
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	panel: panel {
112*4882a593Smuzhiyun		compatible = "nec,nl4827hc19-05b";
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun		port {
115*4882a593Smuzhiyun			panel_in: endpoint {
116*4882a593Smuzhiyun				remote-endpoint = <&dcu_out>;
117*4882a593Smuzhiyun			};
118*4882a593Smuzhiyun		};
119*4882a593Smuzhiyun	};
120*4882a593Smuzhiyun};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun&dcu {
123*4882a593Smuzhiyun	status = "okay";
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun	port {
126*4882a593Smuzhiyun		dcu_out: endpoint {
127*4882a593Smuzhiyun			remote-endpoint = <&panel_in>;
128*4882a593Smuzhiyun		};
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&dspi1 {
133*4882a593Smuzhiyun	bus-num = <0>;
134*4882a593Smuzhiyun	status = "okay";
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	dspiflash: s25fl064k@0 {
137*4882a593Smuzhiyun		#address-cells = <1>;
138*4882a593Smuzhiyun		#size-cells = <1>;
139*4882a593Smuzhiyun		compatible = "spansion,s25fl064k";
140*4882a593Smuzhiyun		spi-max-frequency = <16000000>;
141*4882a593Smuzhiyun		spi-cpol;
142*4882a593Smuzhiyun		spi-cpha;
143*4882a593Smuzhiyun		reg = <0>;
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun&enet0 {
148*4882a593Smuzhiyun	tbi-handle = <&tbi0>;
149*4882a593Smuzhiyun	phy-handle = <&sgmii_phy2>;
150*4882a593Smuzhiyun	phy-connection-type = "sgmii";
151*4882a593Smuzhiyun	status = "okay";
152*4882a593Smuzhiyun};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun&enet1 {
155*4882a593Smuzhiyun	tbi-handle = <&tbi1>;
156*4882a593Smuzhiyun	phy-handle = <&sgmii_phy0>;
157*4882a593Smuzhiyun	phy-connection-type = "sgmii";
158*4882a593Smuzhiyun	status = "okay";
159*4882a593Smuzhiyun};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun&enet2 {
162*4882a593Smuzhiyun	phy-handle = <&rgmii_phy1>;
163*4882a593Smuzhiyun	phy-connection-type = "rgmii-id";
164*4882a593Smuzhiyun	status = "okay";
165*4882a593Smuzhiyun};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun&i2c0 {
168*4882a593Smuzhiyun	status = "okay";
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun	ina220@40 {
171*4882a593Smuzhiyun		compatible = "ti,ina220";
172*4882a593Smuzhiyun		reg = <0x40>;
173*4882a593Smuzhiyun		shunt-resistor = <1000>;
174*4882a593Smuzhiyun	};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun	ina220@41 {
177*4882a593Smuzhiyun		compatible = "ti,ina220";
178*4882a593Smuzhiyun		reg = <0x41>;
179*4882a593Smuzhiyun		shunt-resistor = <1000>;
180*4882a593Smuzhiyun	};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun&i2c1 {
185*4882a593Smuzhiyun	status = "okay";
186*4882a593Smuzhiyun	codec: sgtl5000@a {
187*4882a593Smuzhiyun		#sound-dai-cells = <0>;
188*4882a593Smuzhiyun		compatible = "fsl,sgtl5000";
189*4882a593Smuzhiyun		reg = <0x0a>;
190*4882a593Smuzhiyun		VDDA-supply = <&reg_3p3v>;
191*4882a593Smuzhiyun		VDDIO-supply = <&reg_3p3v>;
192*4882a593Smuzhiyun		clocks = <&sys_mclk>;
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun&ifc {
197*4882a593Smuzhiyun	#address-cells = <2>;
198*4882a593Smuzhiyun	#size-cells = <1>;
199*4882a593Smuzhiyun	/* NOR Flash on board */
200*4882a593Smuzhiyun	ranges = <0x0 0x0 0x0 0x60000000 0x08000000>;
201*4882a593Smuzhiyun	status = "okay";
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun	nor@0,0 {
204*4882a593Smuzhiyun		#address-cells = <1>;
205*4882a593Smuzhiyun		#size-cells = <1>;
206*4882a593Smuzhiyun		compatible = "cfi-flash";
207*4882a593Smuzhiyun		reg = <0x0 0x0 0x8000000>;
208*4882a593Smuzhiyun		big-endian;
209*4882a593Smuzhiyun		bank-width = <2>;
210*4882a593Smuzhiyun		device-width = <1>;
211*4882a593Smuzhiyun	};
212*4882a593Smuzhiyun};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun&lpuart0 {
215*4882a593Smuzhiyun	status = "okay";
216*4882a593Smuzhiyun};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun&mdio0 {
219*4882a593Smuzhiyun	sgmii_phy0: ethernet-phy@0 {
220*4882a593Smuzhiyun		reg = <0x0>;
221*4882a593Smuzhiyun	};
222*4882a593Smuzhiyun	rgmii_phy1: ethernet-phy@1 {
223*4882a593Smuzhiyun		reg = <0x1>;
224*4882a593Smuzhiyun	};
225*4882a593Smuzhiyun	sgmii_phy2: ethernet-phy@2 {
226*4882a593Smuzhiyun		reg = <0x2>;
227*4882a593Smuzhiyun	};
228*4882a593Smuzhiyun	tbi0: tbi-phy@1f {
229*4882a593Smuzhiyun		reg = <0x1f>;
230*4882a593Smuzhiyun		device_type = "tbi-phy";
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun&mdio1 {
235*4882a593Smuzhiyun	tbi1: tbi-phy@1f {
236*4882a593Smuzhiyun		reg = <0x1f>;
237*4882a593Smuzhiyun		device_type = "tbi-phy";
238*4882a593Smuzhiyun	};
239*4882a593Smuzhiyun};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun&esdhc {
242*4882a593Smuzhiyun        status = "okay";
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&qspi {
246*4882a593Smuzhiyun	status = "okay";
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun	n25q128a130: flash@0 {
249*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
250*4882a593Smuzhiyun		#address-cells = <1>;
251*4882a593Smuzhiyun		#size-cells = <1>;
252*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
253*4882a593Smuzhiyun		reg = <0>;
254*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
255*4882a593Smuzhiyun		spi-tx-bus-width = <4>;
256*4882a593Smuzhiyun	};
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&sai1 {
260*4882a593Smuzhiyun	status = "okay";
261*4882a593Smuzhiyun};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun&sata {
264*4882a593Smuzhiyun	status = "okay";
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&uart0 {
268*4882a593Smuzhiyun	status = "okay";
269*4882a593Smuzhiyun};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun&uart1 {
272*4882a593Smuzhiyun	status = "okay";
273*4882a593Smuzhiyun};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun&can0 {
276*4882a593Smuzhiyun	status = "okay";
277*4882a593Smuzhiyun};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun&can1 {
280*4882a593Smuzhiyun	status = "okay";
281*4882a593Smuzhiyun};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun&can2 {
284*4882a593Smuzhiyun	status = "disabled";
285*4882a593Smuzhiyun};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun&can3 {
288*4882a593Smuzhiyun	status = "disabled";
289*4882a593Smuzhiyun};
290