1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/ 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Author: Harry YJ Jhou (周亞諄) <harryyj.jhou@moxa.com> 6*4882a593Smuzhiyun * Jimmy Chen (陳永達) <jimmy.chen@moxa.com> 7*4882a593Smuzhiyun * SZ Lin (林上智) <sz.lin@moxa.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/dts-v1/; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 13*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 14*4882a593Smuzhiyun#include "ls1021a.dtsi" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/ { 17*4882a593Smuzhiyun model = "Moxa UC-8410A"; 18*4882a593Smuzhiyun compatible = "fsl,ls1021a-moxa-uc-8410a", "fsl,ls1021a"; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun aliases { 21*4882a593Smuzhiyun enet0_rgmii_phy = &rgmii_phy0; 22*4882a593Smuzhiyun enet1_rgmii_phy = &rgmii_phy1; 23*4882a593Smuzhiyun enet2_rgmii_phy = &rgmii_phy2; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun sys_mclk: clock-mclk { 27*4882a593Smuzhiyun compatible = "fixed-clock"; 28*4882a593Smuzhiyun #clock-cells = <0>; 29*4882a593Smuzhiyun clock-frequency = <24576000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun reg_3p3v: regulator-3p3v { 33*4882a593Smuzhiyun compatible = "regulator-fixed"; 34*4882a593Smuzhiyun regulator-name = "3P3V"; 35*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 36*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 37*4882a593Smuzhiyun regulator-always-on; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun leds { 41*4882a593Smuzhiyun compatible = "gpio-leds"; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun cel-pwr { 44*4882a593Smuzhiyun label = "UC8410A:CEL-PWR"; 45*4882a593Smuzhiyun gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; 46*4882a593Smuzhiyun default-state = "off"; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun cel-reset { 50*4882a593Smuzhiyun label = "UC8410A:CEL-RESET"; 51*4882a593Smuzhiyun gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; 52*4882a593Smuzhiyun default-state = "off"; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun str-led { 56*4882a593Smuzhiyun label = "UC8410A:RED:PROG"; 57*4882a593Smuzhiyun gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; 58*4882a593Smuzhiyun linux,default-trigger = "mmc0"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun sw-ready { 62*4882a593Smuzhiyun label = "UC8410A:GREEN:SWRDY"; 63*4882a593Smuzhiyun gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; 64*4882a593Smuzhiyun default-state = "on"; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun beeper { 68*4882a593Smuzhiyun label = "UC8410A:BEEP"; 69*4882a593Smuzhiyun gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 70*4882a593Smuzhiyun default-state = "off"; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun prog-led0 { 74*4882a593Smuzhiyun label = "UC8410A:GREEN:PROG2"; 75*4882a593Smuzhiyun gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 76*4882a593Smuzhiyun default-state = "off"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun prog-led1 { 80*4882a593Smuzhiyun label = "UC8410A:GREEN:PROG1"; 81*4882a593Smuzhiyun gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; 82*4882a593Smuzhiyun default-state = "off"; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun prog-led2 { 86*4882a593Smuzhiyun label = "UC8410A:GREEN:PROG0"; 87*4882a593Smuzhiyun gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; 88*4882a593Smuzhiyun default-state = "off"; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun wifi-signal0 { 92*4882a593Smuzhiyun label = "UC8410A:GREEN:CEL2"; 93*4882a593Smuzhiyun gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; 94*4882a593Smuzhiyun default-state = "off"; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun wifi-signal1 { 98*4882a593Smuzhiyun label = "UC8410A:GREEN:CEL1"; 99*4882a593Smuzhiyun gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; 100*4882a593Smuzhiyun default-state = "off"; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun wifi-signal2 { 104*4882a593Smuzhiyun label = "UC8410A:GREEN:CEL0"; 105*4882a593Smuzhiyun gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; 106*4882a593Smuzhiyun default-state = "off"; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun cpu-diag-red { 110*4882a593Smuzhiyun label = "UC8410A:RED:DIA"; 111*4882a593Smuzhiyun gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; 112*4882a593Smuzhiyun default-state = "off"; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun cpu-diag-green { 116*4882a593Smuzhiyun label = "UC8410A:GREEN:DIA"; 117*4882a593Smuzhiyun gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 118*4882a593Smuzhiyun default-state = "off"; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun cpu-diag-yellow { 122*4882a593Smuzhiyun label = "UC8410A:YELLOW:DIA"; 123*4882a593Smuzhiyun gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; 124*4882a593Smuzhiyun default-state = "off"; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun gpio-keys { 129*4882a593Smuzhiyun compatible = "gpio-keys"; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun pushbtn-key { 132*4882a593Smuzhiyun label = "push button key"; 133*4882a593Smuzhiyun gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; 134*4882a593Smuzhiyun linux,code = <BTN_MISC>; 135*4882a593Smuzhiyun default-state = "on"; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&enet0 { 141*4882a593Smuzhiyun phy-handle = <&rgmii_phy0>; 142*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 143*4882a593Smuzhiyun status = "okay"; 144*4882a593Smuzhiyun}; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun&enet1 { 147*4882a593Smuzhiyun phy-handle = <&rgmii_phy1>; 148*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 149*4882a593Smuzhiyun status = "okay"; 150*4882a593Smuzhiyun}; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun&enet2 { 153*4882a593Smuzhiyun phy-handle = <&rgmii_phy2>; 154*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 155*4882a593Smuzhiyun status = "okay"; 156*4882a593Smuzhiyun}; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun&i2c0 { 159*4882a593Smuzhiyun clock-frequency = <100000>; 160*4882a593Smuzhiyun status = "okay"; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun tpm@20 { 163*4882a593Smuzhiyun compatible = "infineon,slb9635tt"; 164*4882a593Smuzhiyun reg = <0x20>; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun rtc@68 { 168*4882a593Smuzhiyun compatible = "dallas,ds1374"; 169*4882a593Smuzhiyun reg = <0x68>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun}; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun&lpuart0 { 174*4882a593Smuzhiyun status = "okay"; 175*4882a593Smuzhiyun}; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun&mdio0 { 178*4882a593Smuzhiyun rgmii_phy0: ethernet-phy@0 { 179*4882a593Smuzhiyun compatible = "marvell,88e1118"; 180*4882a593Smuzhiyun reg = <0x0>; 181*4882a593Smuzhiyun marvell,reg-init = 182*4882a593Smuzhiyun <3 0x11 0 0x4415>, /* Reg 3,17 */ 183*4882a593Smuzhiyun <3 0x10 0 0x77>; /* Reg 3,16 */ 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun rgmii_phy1: ethernet-phy@1 { 187*4882a593Smuzhiyun compatible = "marvell,88e1118"; 188*4882a593Smuzhiyun reg = <0x1>; 189*4882a593Smuzhiyun marvell,reg-init = 190*4882a593Smuzhiyun <3 0x11 0 0x4415>, /* Reg 3,17 */ 191*4882a593Smuzhiyun <3 0x10 0 0x77>; /* Reg 3,16 */ 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun rgmii_phy2: ethernet-phy@2 { 195*4882a593Smuzhiyun compatible = "marvell,88e1118"; 196*4882a593Smuzhiyun reg = <0x2>; 197*4882a593Smuzhiyun marvell,reg-init = 198*4882a593Smuzhiyun <3 0x11 0 0x4415>, /* Reg 3,17 */ 199*4882a593Smuzhiyun <3 0x10 0 0x77>; /* Reg 3,16 */ 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&qspi { 204*4882a593Smuzhiyun status = "okay"; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun flash: flash@0 { 207*4882a593Smuzhiyun compatible = "spansion,s25fl064l", "spansion,s25fl164k"; 208*4882a593Smuzhiyun #address-cells = <1>; 209*4882a593Smuzhiyun #size-cells = <1>; 210*4882a593Smuzhiyun spi-max-frequency = <20000000>; 211*4882a593Smuzhiyun spi-rx-bus-width = <4>; 212*4882a593Smuzhiyun spi-tx-bus-width = <4>; 213*4882a593Smuzhiyun reg = <0>; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun partitions@0 { 216*4882a593Smuzhiyun label = "U-Boot"; 217*4882a593Smuzhiyun reg = <0x0 0x180000>; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun partitions@180000 { 221*4882a593Smuzhiyun label = "U-Boot Env"; 222*4882a593Smuzhiyun reg = <0x180000 0x680000>; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun}; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun&sata { 228*4882a593Smuzhiyun status = "okay"; 229*4882a593Smuzhiyun}; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun&uart0 { 232*4882a593Smuzhiyun status = "okay"; 233*4882a593Smuzhiyun}; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun&uart1 { 236*4882a593Smuzhiyun status = "okay"; 237*4882a593Smuzhiyun}; 238