1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/ { 4*4882a593Smuzhiyun gpio_keys { 5*4882a593Smuzhiyun compatible = "gpio-keys"; 6*4882a593Smuzhiyun pinctrl-names = "default"; 7*4882a593Smuzhiyun pinctrl-0 = <&gpio_key_pins>; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun sysboot2 { 10*4882a593Smuzhiyun label = "gpio3"; 11*4882a593Smuzhiyun gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* gpio_111 / uP_GPIO_3 */ 12*4882a593Smuzhiyun linux,code = <BTN_0>; 13*4882a593Smuzhiyun wakeup-source; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun sound { 18*4882a593Smuzhiyun compatible = "ti,omap-twl4030"; 19*4882a593Smuzhiyun ti,model = "omap3logic"; 20*4882a593Smuzhiyun ti,mcbsp = <&mcbsp2>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun leds { 24*4882a593Smuzhiyun compatible = "gpio-leds"; 25*4882a593Smuzhiyun pinctrl-names = "default"; 26*4882a593Smuzhiyun pinctrl-0 = <&led_pins &led_pins_wkup>; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun led1 { 29*4882a593Smuzhiyun label = "led1"; 30*4882a593Smuzhiyun gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; /* gpio133 */ 31*4882a593Smuzhiyun linux,default-trigger = "cpu0"; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun led2 { 35*4882a593Smuzhiyun label = "led2"; 36*4882a593Smuzhiyun gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* gpio11 */ 37*4882a593Smuzhiyun linux,default-trigger = "none"; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun}; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun&vaux1 { 43*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 44*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&vaux4 { 48*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 49*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 50*4882a593Smuzhiyun}; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun&mcbsp2 { 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun pinctrl-names = "default"; 55*4882a593Smuzhiyun pinctrl-0 = <&mcbsp2_pins>; 56*4882a593Smuzhiyun}; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun&charger { 59*4882a593Smuzhiyun ti,bb-uvolt = <3200000>; 60*4882a593Smuzhiyun ti,bb-uamp = <150>; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun&gpmc { 64*4882a593Smuzhiyun ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */ 65*4882a593Smuzhiyun 1 0 0x2c000000 0x1000000 /* CS1: 16MB for LAN9221 */ 66*4882a593Smuzhiyun 2 0 0x10000000 0x2000000>; /* CS2: 32MB for NOR */ 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun ethernet@gpmc { 69*4882a593Smuzhiyun pinctrl-names = "default"; 70*4882a593Smuzhiyun pinctrl-0 = <&lan9221_pins>; 71*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 72*4882a593Smuzhiyun interrupts = <24 IRQ_TYPE_LEVEL_LOW>; /* gpio_152 */ 73*4882a593Smuzhiyun reg = <1 0 0xff>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&vpll2 { 78*4882a593Smuzhiyun regulator-always-on; 79*4882a593Smuzhiyun}; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun&dss { 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun vdds_dsi-supply = <&vpll2>; 84*4882a593Smuzhiyun vdda_video-supply = <&video_reg>; 85*4882a593Smuzhiyun pinctrl-names = "default"; 86*4882a593Smuzhiyun pinctrl-0 = <&dss_dpi_pins1>; 87*4882a593Smuzhiyun port { 88*4882a593Smuzhiyun dpi_out: endpoint { 89*4882a593Smuzhiyun remote-endpoint = <&lcd_in>; 90*4882a593Smuzhiyun data-lines = <16>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun/ { 96*4882a593Smuzhiyun aliases { 97*4882a593Smuzhiyun display0 = &lcd0; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun video_reg: video_reg { 101*4882a593Smuzhiyun compatible = "regulator-fixed"; 102*4882a593Smuzhiyun regulator-name = "fixed-supply"; 103*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 104*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun lcd0: display { 108*4882a593Smuzhiyun /* This isn't the exact LCD, but the timings meet spec */ 109*4882a593Smuzhiyun compatible = "logicpd,type28"; 110*4882a593Smuzhiyun pinctrl-names = "default"; 111*4882a593Smuzhiyun pinctrl-0 = <&lcd_enable_pin>; 112*4882a593Smuzhiyun backlight = <&bl>; 113*4882a593Smuzhiyun enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; 114*4882a593Smuzhiyun port { 115*4882a593Smuzhiyun lcd_in: endpoint { 116*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun bl: backlight { 122*4882a593Smuzhiyun compatible = "pwm-backlight"; 123*4882a593Smuzhiyun pinctrl-names = "default"; 124*4882a593Smuzhiyun pinctrl-0 = <&backlight_pins>; 125*4882a593Smuzhiyun pwms = <&twl_pwm 0 5000000>; 126*4882a593Smuzhiyun brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; 127*4882a593Smuzhiyun default-brightness-level = <7>; 128*4882a593Smuzhiyun enable-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* gpio_8 */ 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&mmc1 { 133*4882a593Smuzhiyun interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>; 134*4882a593Smuzhiyun pinctrl-names = "default"; 135*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins>; 136*4882a593Smuzhiyun wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */ 137*4882a593Smuzhiyun cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* gpio_110 */ 138*4882a593Smuzhiyun vmmc-supply = <&vmmc1>; 139*4882a593Smuzhiyun bus-width = <4>; 140*4882a593Smuzhiyun cap-power-off-card; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&omap3_pmx_core { 144*4882a593Smuzhiyun gpio_key_pins: pinmux_gpio_key_pins { 145*4882a593Smuzhiyun pinctrl-single,pins = < 146*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_xclkb.gpio_111 / uP_GPIO_3*/ 147*4882a593Smuzhiyun >; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun led_pins: pinmux_led_pins { 151*4882a593Smuzhiyun pinctrl-single,pins = < 152*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x215e, PIN_OUTPUT_PULLUP | MUX_MODE4) /* sdmmc2_dat1.gpio_133 / uP_GPIO_0 */ 153*4882a593Smuzhiyun >; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun lan9221_pins: pinmux_lan9221_pins { 157*4882a593Smuzhiyun pinctrl-single,pins = < 158*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */ 159*4882a593Smuzhiyun >; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun mmc1_pins: pinmux_mmc1_pins { 163*4882a593Smuzhiyun pinctrl-single,pins = < 164*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 165*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 166*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 167*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 168*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 169*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 170*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_strobe.gpio_126 */ 171*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_d11.gpio_110 */ 172*4882a593Smuzhiyun >; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun lcd_enable_pin: pinmux_lcd_enable_pin { 176*4882a593Smuzhiyun pinctrl-single,pins = < 177*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* mcbsp4_fs.gpio_155 */ 178*4882a593Smuzhiyun >; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun dss_dpi_pins1: pinmux_dss_dpi_pins1 { 182*4882a593Smuzhiyun pinctrl-single,pins = < 183*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_pclk.dss_pclk */ 184*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_hsync.dss_hsync */ 185*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_vsync.dss_vsync */ 186*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_acbias.dss_acbias */ 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data0.dss_data0 */ 189*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data1.dss_data1 */ 190*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data2.dss_data2 */ 191*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data3.dss_data3 */ 192*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data4.dss_data4 */ 193*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data5.dss_data5 */ 194*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data6.dss_data6 */ 195*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data7.dss_data7 */ 196*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data8.dss_data8 */ 197*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data9.dss_data9 */ 198*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data10.dss_data10 */ 199*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data11.dss_data11 */ 200*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data12.dss_data12 */ 201*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data13.dss_data13 */ 202*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data14.dss_data14 */ 203*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0) /* dss_data15.dss_data15 */ 204*4882a593Smuzhiyun >; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&omap3_pmx_wkup { 209*4882a593Smuzhiyun led_pins_wkup: pinmux_led_pins_wkup { 210*4882a593Smuzhiyun pinctrl-single,pins = < 211*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 / uP_GPIO_1 */ 212*4882a593Smuzhiyun >; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun backlight_pins: pinmux_backlight_pins { 216*4882a593Smuzhiyun pinctrl-single,pins = < 217*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* sys_boot6.gpio_8 */ 218*4882a593Smuzhiyun >; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun}; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun&uart1 { 224*4882a593Smuzhiyun interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>; 225*4882a593Smuzhiyun}; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */ 228*4882a593Smuzhiyun&usb_otg_hs { 229*4882a593Smuzhiyun pinctrl-names = "default"; 230*4882a593Smuzhiyun pinctrl-0 = <&hsusb_otg_pins>; 231*4882a593Smuzhiyun interface-type = <0>; 232*4882a593Smuzhiyun usb-phy = <&usb2_phy>; 233*4882a593Smuzhiyun phys = <&usb2_phy>; 234*4882a593Smuzhiyun phy-names = "usb2-phy"; 235*4882a593Smuzhiyun mode = <3>; 236*4882a593Smuzhiyun power = <50>; 237*4882a593Smuzhiyun}; 238