1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree include file for QNAP TS41X 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013, Andrew Lunn <andrew@lunn.ch> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "QNAP TS419 family"; 10*4882a593Smuzhiyun compatible = "qnap,ts419", "marvell,kirkwood"; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun ocp@f1000000 { 13*4882a593Smuzhiyun pinctrl: pin-controller@10000 { 14*4882a593Smuzhiyun pinctrl-names = "default"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun pmx_USB_copy_button: pmx-USB-copy-button { 17*4882a593Smuzhiyun marvell,pins = "mpp43"; 18*4882a593Smuzhiyun marvell,function = "gpio"; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun pmx_reset_button: pmx-reset-button { 21*4882a593Smuzhiyun marvell,pins = "mpp37"; 22*4882a593Smuzhiyun marvell,function = "gpio"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * JP1 indicates if an LCD module is installed 26*4882a593Smuzhiyun * on the serial port (0), or if the port is used 27*4882a593Smuzhiyun * as a console (1). 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun pmx_jumper_jp1: pmx-jumper_jp1 { 30*4882a593Smuzhiyun marvell,pins = "mpp45"; 31*4882a593Smuzhiyun marvell,function = "gpio"; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun gpio_keys { 38*4882a593Smuzhiyun compatible = "gpio-keys"; 39*4882a593Smuzhiyun #address-cells = <1>; 40*4882a593Smuzhiyun #size-cells = <0>; 41*4882a593Smuzhiyun pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>; 42*4882a593Smuzhiyun pinctrl-names = "default"; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun copy { 45*4882a593Smuzhiyun label = "USB Copy"; 46*4882a593Smuzhiyun linux,code = <KEY_COPY>; 47*4882a593Smuzhiyun gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun reset { 50*4882a593Smuzhiyun label = "Reset"; 51*4882a593Smuzhiyun linux,code = <KEY_RESTART>; 52*4882a593Smuzhiyun gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&mdio { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun ethphy1: ethernet-phy@1 { 61*4882a593Smuzhiyun device_type = "ethernet-phy"; 62*4882a593Smuzhiyun /* overwrite reg property in board file */ 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun}; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyunð1 { 67*4882a593Smuzhiyun status = "okay"; 68*4882a593Smuzhiyun ethernet1-port@0 { 69*4882a593Smuzhiyun phy-handle = <ðphy1>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun}; 72