1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Marvell RD88F6181 Common Board descrition 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Andrew Lunn <andrew@lunn.ch> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This file contains the definitions that are common between the two 8*4882a593Smuzhiyun * variants of the Marvell Kirkwood Development Board. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include "kirkwood.dtsi" 12*4882a593Smuzhiyun#include "kirkwood-6281.dtsi" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/ { 15*4882a593Smuzhiyun memory { 16*4882a593Smuzhiyun device_type = "memory"; 17*4882a593Smuzhiyun reg = <0x00000000 0x20000000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun bootargs = "console=ttyS0,115200n8"; 22*4882a593Smuzhiyun stdout-path = &uart0; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun ocp@f1000000 { 26*4882a593Smuzhiyun pinctrl: pin-controller@10000 { 27*4882a593Smuzhiyun pinctrl-names = "default"; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun pmx_sdio_cd: pmx-sdio-cd { 30*4882a593Smuzhiyun marvell,pins = "mpp28"; 31*4882a593Smuzhiyun marvell,function = "gpio"; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun serial@12000 { 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun sata@80000 { 41*4882a593Smuzhiyun status = "okay"; 42*4882a593Smuzhiyun nr-ports = <2>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun mvsdio@90000 { 45*4882a593Smuzhiyun pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>; 46*4882a593Smuzhiyun pinctrl-names = "default"; 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; 49*4882a593Smuzhiyun /* No WP GPIO */ 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&nand { 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun partition@0 { 58*4882a593Smuzhiyun label = "u-boot"; 59*4882a593Smuzhiyun reg = <0x0000000 0x100000>; 60*4882a593Smuzhiyun read-only; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun partition@100000 { 64*4882a593Smuzhiyun label = "uImage"; 65*4882a593Smuzhiyun reg = <0x0100000 0x200000>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun partition@300000 { 69*4882a593Smuzhiyun label = "rootfs"; 70*4882a593Smuzhiyun reg = <0x0300000 0x500000>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&mdio { 75*4882a593Smuzhiyun status = "okay"; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun switch: switch@0 { 78*4882a593Smuzhiyun compatible = "marvell,mv88e6085"; 79*4882a593Smuzhiyun #address-cells = <1>; 80*4882a593Smuzhiyun #size-cells = <0>; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun ports { 83*4882a593Smuzhiyun #address-cells = <1>; 84*4882a593Smuzhiyun #size-cells = <0>; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun port@0 { 87*4882a593Smuzhiyun reg = <0>; 88*4882a593Smuzhiyun label = "lan1"; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun port@1 { 92*4882a593Smuzhiyun reg = <1>; 93*4882a593Smuzhiyun label = "lan2"; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun port@2 { 97*4882a593Smuzhiyun reg = <2>; 98*4882a593Smuzhiyun label = "lan3"; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun port@3 { 102*4882a593Smuzhiyun reg = <3>; 103*4882a593Smuzhiyun label = "lan4"; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun port@5 { 107*4882a593Smuzhiyun reg = <5>; 108*4882a593Smuzhiyun label = "cpu"; 109*4882a593Smuzhiyun ethernet = <ð0port>; 110*4882a593Smuzhiyun fixed-link { 111*4882a593Smuzhiyun speed = <1000>; 112*4882a593Smuzhiyun full-duplex; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun}; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyunð0 { 121*4882a593Smuzhiyun status = "okay"; 122*4882a593Smuzhiyun ethernet0-port@0 { 123*4882a593Smuzhiyun speed = <1000>; 124*4882a593Smuzhiyun duplex = <1>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun}; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun&pciec { 129*4882a593Smuzhiyun status = "okay"; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&pcie0 { 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun}; 135