1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Marvell RD88F6181 A Board descrition 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Andrew Lunn <andrew@lunn.ch> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This file contains the definitions for the board with the A0 or 8*4882a593Smuzhiyun * higher stepping of the SoC. The ethernet switch does not have a 9*4882a593Smuzhiyun * "wan" port. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/dts-v1/; 13*4882a593Smuzhiyun#include "kirkwood-rd88f6281.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "Marvell RD88f6281 Reference design, with A0 or higher SoC"; 17*4882a593Smuzhiyun compatible = "marvell,rd88f6281-a", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun}; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun&mdio { 22*4882a593Smuzhiyun status = "okay"; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun ethphy1: ethernet-phy@11 { 25*4882a593Smuzhiyun reg = <11>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun}; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun&switch { 30*4882a593Smuzhiyun reg = <10>; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunð1 { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun ethernet1-port@0 { 37*4882a593Smuzhiyun phy-handle = <ðphy1>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun}; 40