1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Marvell OpenRD Client Board Description 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Andrew Lunn <andrew@lunn.ch> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This file contains the definitions that are specific to OpenRD 8*4882a593Smuzhiyun * client variant of the Marvell Kirkwood Development Board. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun#include "kirkwood-openrd.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "OpenRD Client"; 17*4882a593Smuzhiyun compatible = "marvell,openrd-client", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun ocp@f1000000 { 20*4882a593Smuzhiyun audio-controller@a0000 { 21*4882a593Smuzhiyun status = "okay"; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun i2c@11000 { 24*4882a593Smuzhiyun status = "okay"; 25*4882a593Smuzhiyun clock-frequency = <400000>; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun cs42l51: cs42l51@4a { 28*4882a593Smuzhiyun compatible = "cirrus,cs42l51"; 29*4882a593Smuzhiyun reg = <0x4a>; 30*4882a593Smuzhiyun #sound-dai-cells = <0>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun sound { 36*4882a593Smuzhiyun compatible = "simple-audio-card"; 37*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 38*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun simple-audio-card,cpu { 41*4882a593Smuzhiyun sound-dai = <&audio0 0>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun simple-audio-card,codec { 45*4882a593Smuzhiyun sound-dai = <&cs42l51>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&mdio { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun ethphy0: ethernet-phy@8 { 54*4882a593Smuzhiyun reg = <8>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun ethphy1: ethernet-phy@24 { 57*4882a593Smuzhiyun reg = <24>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunð0 { 62*4882a593Smuzhiyun status = "okay"; 63*4882a593Smuzhiyun ethernet0-port@0 { 64*4882a593Smuzhiyun phy-handle = <ðphy0>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun}; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyunð1 { 69*4882a593Smuzhiyun status = "okay"; 70*4882a593Smuzhiyun ethernet1-port@0 { 71*4882a593Smuzhiyun phy-handle = <ðphy1>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75