xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for Seagate Blackarmor NAS220
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014 Evgeni Dobrev <evgeni@studio-punkt.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
11*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
12*4882a593Smuzhiyun#include "kirkwood.dtsi"
13*4882a593Smuzhiyun#include "kirkwood-6192.dtsi"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/ {
16*4882a593Smuzhiyun	model = "Seagate Blackarmor NAS220";
17*4882a593Smuzhiyun	compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192",
18*4882a593Smuzhiyun		     "marvell,kirkwood";
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory { /* 128 MB */
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0x00000000 0x8000000>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	chosen {
26*4882a593Smuzhiyun		bootargs = "console=ttyS0,115200n8";
27*4882a593Smuzhiyun		stdout-path = &uart0;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	gpio_poweroff {
31*4882a593Smuzhiyun		compatible = "gpio-poweroff";
32*4882a593Smuzhiyun		gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	gpio_keys {
36*4882a593Smuzhiyun		compatible = "gpio-keys";
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		reset {
39*4882a593Smuzhiyun			label = "Reset";
40*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
41*4882a593Smuzhiyun			gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		button {
45*4882a593Smuzhiyun			label = "Power";
46*4882a593Smuzhiyun			linux,code = <KEY_SLEEP>;
47*4882a593Smuzhiyun			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	gpio-leds {
52*4882a593Smuzhiyun		compatible = "gpio-leds";
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		blue-power {
55*4882a593Smuzhiyun			label = "nas220:blue:power";
56*4882a593Smuzhiyun			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
57*4882a593Smuzhiyun			linux,default-trigger = "default-on";
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	regulators {
62*4882a593Smuzhiyun		compatible = "simple-bus";
63*4882a593Smuzhiyun		#address-cells = <1>;
64*4882a593Smuzhiyun		#size-cells = <0>;
65*4882a593Smuzhiyun		pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>;
66*4882a593Smuzhiyun		pinctrl-names = "default";
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		sata0_power: regulator@1 {
69*4882a593Smuzhiyun			compatible = "regulator-fixed";
70*4882a593Smuzhiyun			reg = <1>;
71*4882a593Smuzhiyun			regulator-name = "SATA0 Power";
72*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
73*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
74*4882a593Smuzhiyun			enable-active-high;
75*4882a593Smuzhiyun			regulator-always-on;
76*4882a593Smuzhiyun			regulator-boot-on;
77*4882a593Smuzhiyun			gpio = <&gpio0 24 GPIO_ACTIVE_LOW>;
78*4882a593Smuzhiyun		};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun		sata1_power: regulator@2 {
81*4882a593Smuzhiyun			compatible = "regulator-fixed";
82*4882a593Smuzhiyun			reg = <2>;
83*4882a593Smuzhiyun			regulator-name = "SATA1 Power";
84*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
85*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
86*4882a593Smuzhiyun			enable-active-high;
87*4882a593Smuzhiyun			regulator-always-on;
88*4882a593Smuzhiyun			regulator-boot-on;
89*4882a593Smuzhiyun			gpio = <&gpio0 28 GPIO_ACTIVE_LOW>;
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun/*
95*4882a593Smuzhiyun * Serial port routed to connector CN5
96*4882a593Smuzhiyun *
97*4882a593Smuzhiyun * pin 1 - TX (CPU's TX)
98*4882a593Smuzhiyun * pin 4 - RX (CPU's RX)
99*4882a593Smuzhiyun * pin 6 - GND
100*4882a593Smuzhiyun */
101*4882a593Smuzhiyun&uart0 {
102*4882a593Smuzhiyun	status = "okay";
103*4882a593Smuzhiyun};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun&pinctrl {
106*4882a593Smuzhiyun	pinctrl-0 = <&pmx_button_reset &pmx_button_power>;
107*4882a593Smuzhiyun	pinctrl-names = "default";
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	pmx_act_sata0: pmx-act-sata0 {
110*4882a593Smuzhiyun		marvell,pins = "mpp15";
111*4882a593Smuzhiyun		marvell,function = "sata0";
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	pmx_act_sata1: pmx-act-sata1 {
115*4882a593Smuzhiyun		marvell,pins = "mpp16";
116*4882a593Smuzhiyun		marvell,function = "sata1";
117*4882a593Smuzhiyun	};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun	pmx_power_sata0: pmx-power-sata0 {
120*4882a593Smuzhiyun		marvell,pins = "mpp24";
121*4882a593Smuzhiyun		marvell,function = "gpio";
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun	pmx_power_sata1: pmx-power-sata1 {
125*4882a593Smuzhiyun		marvell,pins = "mpp28";
126*4882a593Smuzhiyun		marvell,function = "gpio";
127*4882a593Smuzhiyun	};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun	pmx_button_reset: pmx-button-reset {
130*4882a593Smuzhiyun		marvell,pins = "mpp29";
131*4882a593Smuzhiyun		marvell,function = "gpio";
132*4882a593Smuzhiyun	};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun	pmx_button_power: pmx-button-power {
135*4882a593Smuzhiyun		marvell,pins = "mpp26";
136*4882a593Smuzhiyun		marvell,function = "gpio";
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&sata {
141*4882a593Smuzhiyun	status = "okay";
142*4882a593Smuzhiyun	nr-ports = <2>;
143*4882a593Smuzhiyun};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun&i2c0 {
146*4882a593Smuzhiyun	status = "okay";
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun	adt7476: thermal@2e {
149*4882a593Smuzhiyun		compatible = "adi,adt7476";
150*4882a593Smuzhiyun		reg = <0x2e>;
151*4882a593Smuzhiyun	};
152*4882a593Smuzhiyun};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun&nand {
155*4882a593Smuzhiyun	status = "okay";
156*4882a593Smuzhiyun};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun&mdio {
159*4882a593Smuzhiyun	status = "okay";
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	ethphy0: ethernet-phy@8 {
162*4882a593Smuzhiyun		 reg = <8>;
163*4882a593Smuzhiyun	};
164*4882a593Smuzhiyun};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun&eth0 {
167*4882a593Smuzhiyun	status = "okay";
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun	ethernet0-port@0 {
170*4882a593Smuzhiyun		phy-handle = <&ethphy0>;
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun};
173