xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/keystone-k2e-evm.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Keystone 2 Edison EVM device tree
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include "keystone.dtsi"
10*4882a593Smuzhiyun#include "keystone-k2e.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
14*4882a593Smuzhiyun	model = "Texas Instruments Keystone 2 Edison EVM";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	reserved-memory {
17*4882a593Smuzhiyun		#address-cells = <2>;
18*4882a593Smuzhiyun		#size-cells = <2>;
19*4882a593Smuzhiyun		ranges;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun		dsp_common_memory: dsp-common-memory@81f800000 {
22*4882a593Smuzhiyun			compatible = "shared-dma-pool";
23*4882a593Smuzhiyun			reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
24*4882a593Smuzhiyun			reusable;
25*4882a593Smuzhiyun			status = "okay";
26*4882a593Smuzhiyun		};
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun&soc0 {
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		clocks {
33*4882a593Smuzhiyun			refclksys: refclksys {
34*4882a593Smuzhiyun				#clock-cells = <0>;
35*4882a593Smuzhiyun				compatible = "fixed-clock";
36*4882a593Smuzhiyun				clock-frequency = <100000000>;
37*4882a593Smuzhiyun				clock-output-names = "refclk-sys";
38*4882a593Smuzhiyun			};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun			refclkpass: refclkpass {
41*4882a593Smuzhiyun				#clock-cells = <0>;
42*4882a593Smuzhiyun				compatible = "fixed-clock";
43*4882a593Smuzhiyun				clock-frequency = <100000000>;
44*4882a593Smuzhiyun				clock-output-names = "refclk-pass";
45*4882a593Smuzhiyun			};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun			refclkddr3a: refclkddr3a {
48*4882a593Smuzhiyun				#clock-cells = <0>;
49*4882a593Smuzhiyun				compatible = "fixed-clock";
50*4882a593Smuzhiyun				clock-frequency = <100000000>;
51*4882a593Smuzhiyun				clock-output-names = "refclk-ddr3a";
52*4882a593Smuzhiyun			};
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun&usb_phy {
57*4882a593Smuzhiyun	status = "okay";
58*4882a593Smuzhiyun};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun&keystone_usb0 {
61*4882a593Smuzhiyun	status = "okay";
62*4882a593Smuzhiyun};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun&usb0 {
65*4882a593Smuzhiyun	dr_mode = "host";
66*4882a593Smuzhiyun};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun&usb1_phy {
69*4882a593Smuzhiyun	status = "okay";
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun&keystone_usb1 {
73*4882a593Smuzhiyun	status = "okay";
74*4882a593Smuzhiyun};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun&usb1 {
77*4882a593Smuzhiyun	dr_mode = "peripheral";
78*4882a593Smuzhiyun};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun&i2c0 {
81*4882a593Smuzhiyun	dtt@50 {
82*4882a593Smuzhiyun		compatible = "atmel,24c1024";
83*4882a593Smuzhiyun		reg = <0x50>;
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun&aemif {
88*4882a593Smuzhiyun	cs0 {
89*4882a593Smuzhiyun		#address-cells = <2>;
90*4882a593Smuzhiyun		#size-cells = <1>;
91*4882a593Smuzhiyun		clock-ranges;
92*4882a593Smuzhiyun		ranges;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		ti,cs-chipselect = <0>;
95*4882a593Smuzhiyun		/* all timings in nanoseconds */
96*4882a593Smuzhiyun		ti,cs-min-turnaround-ns = <12>;
97*4882a593Smuzhiyun		ti,cs-read-hold-ns = <6>;
98*4882a593Smuzhiyun		ti,cs-read-strobe-ns = <23>;
99*4882a593Smuzhiyun		ti,cs-read-setup-ns = <9>;
100*4882a593Smuzhiyun		ti,cs-write-hold-ns = <8>;
101*4882a593Smuzhiyun		ti,cs-write-strobe-ns = <23>;
102*4882a593Smuzhiyun		ti,cs-write-setup-ns = <8>;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun		nand@0,0 {
105*4882a593Smuzhiyun			compatible = "ti,keystone-nand","ti,davinci-nand";
106*4882a593Smuzhiyun			#address-cells = <1>;
107*4882a593Smuzhiyun			#size-cells = <1>;
108*4882a593Smuzhiyun			reg = <0 0 0x4000000
109*4882a593Smuzhiyun			       1 0 0x0000100>;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun			ti,davinci-chipselect = <0>;
112*4882a593Smuzhiyun			ti,davinci-mask-ale = <0x2000>;
113*4882a593Smuzhiyun			ti,davinci-mask-cle = <0x4000>;
114*4882a593Smuzhiyun			ti,davinci-mask-chipsel = <0>;
115*4882a593Smuzhiyun			nand-ecc-mode = "hw";
116*4882a593Smuzhiyun			ti,davinci-ecc-bits = <4>;
117*4882a593Smuzhiyun			nand-on-flash-bbt;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun			partition@0 {
120*4882a593Smuzhiyun				label = "u-boot";
121*4882a593Smuzhiyun				reg = <0x0 0x100000>;
122*4882a593Smuzhiyun				read-only;
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun			partition@100000 {
126*4882a593Smuzhiyun				label = "params";
127*4882a593Smuzhiyun				reg = <0x100000 0x80000>;
128*4882a593Smuzhiyun				read-only;
129*4882a593Smuzhiyun			};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun			partition@180000 {
132*4882a593Smuzhiyun				label = "ubifs";
133*4882a593Smuzhiyun				reg = <0x180000 0x1FE80000>;
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun		};
136*4882a593Smuzhiyun	};
137*4882a593Smuzhiyun};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun&spi0 {
140*4882a593Smuzhiyun	nor_flash: n25q128a11@0 {
141*4882a593Smuzhiyun		#address-cells = <1>;
142*4882a593Smuzhiyun		#size-cells = <1>;
143*4882a593Smuzhiyun		compatible = "Micron,n25q128a11";
144*4882a593Smuzhiyun		spi-max-frequency = <54000000>;
145*4882a593Smuzhiyun		m25p,fast-read;
146*4882a593Smuzhiyun		reg = <0>;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun		partition@0 {
149*4882a593Smuzhiyun			label = "u-boot-spl";
150*4882a593Smuzhiyun			reg = <0x0 0x80000>;
151*4882a593Smuzhiyun			read-only;
152*4882a593Smuzhiyun		};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun		partition@1 {
155*4882a593Smuzhiyun			label = "misc";
156*4882a593Smuzhiyun			reg = <0x80000 0xf80000>;
157*4882a593Smuzhiyun		};
158*4882a593Smuzhiyun	};
159*4882a593Smuzhiyun};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun&mdio {
162*4882a593Smuzhiyun	status = "ok";
163*4882a593Smuzhiyun	ethphy0: ethernet-phy@0 {
164*4882a593Smuzhiyun		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
165*4882a593Smuzhiyun		reg = <0>;
166*4882a593Smuzhiyun	};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	ethphy1: ethernet-phy@1 {
169*4882a593Smuzhiyun		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
170*4882a593Smuzhiyun		reg = <1>;
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun&dsp0 {
175*4882a593Smuzhiyun	memory-region = <&dsp_common_memory>;
176*4882a593Smuzhiyun	status = "okay";
177*4882a593Smuzhiyun};
178