xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/iwg20d-q7-dbcm-ca.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Source for the iWave-RZ-G1M/N Daughter Board Camera Module
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017 Renesas Electronics Corp.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	aliases {
10*4882a593Smuzhiyun		serial1 = &scif1;
11*4882a593Smuzhiyun		serial4 = &hscif1;
12*4882a593Smuzhiyun	};
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	cec_clock: cec-clock {
15*4882a593Smuzhiyun		compatible = "fixed-clock";
16*4882a593Smuzhiyun		#clock-cells = <0>;
17*4882a593Smuzhiyun		clock-frequency = <12000000>;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	hdmi-out {
21*4882a593Smuzhiyun		compatible = "hdmi-connector";
22*4882a593Smuzhiyun		type = "a";
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		port {
25*4882a593Smuzhiyun			hdmi_con_out: endpoint {
26*4882a593Smuzhiyun				remote-endpoint = <&adv7511_out>;
27*4882a593Smuzhiyun			};
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun&can1 {
33*4882a593Smuzhiyun	pinctrl-0 = <&can1_pins>;
34*4882a593Smuzhiyun	pinctrl-names = "default";
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	status = "okay";
37*4882a593Smuzhiyun};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun&du {
40*4882a593Smuzhiyun	pinctrl-0 = <&du_pins>;
41*4882a593Smuzhiyun	pinctrl-names = "default";
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	ports {
44*4882a593Smuzhiyun		port@0 {
45*4882a593Smuzhiyun			endpoint {
46*4882a593Smuzhiyun				remote-endpoint = <&adv7511_in>;
47*4882a593Smuzhiyun			};
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun&hscif1 {
53*4882a593Smuzhiyun	pinctrl-0 = <&hscif1_pins>;
54*4882a593Smuzhiyun	pinctrl-names = "default";
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	uart-has-rtscts;
57*4882a593Smuzhiyun	status = "okay";
58*4882a593Smuzhiyun};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun&i2c5 {
61*4882a593Smuzhiyun	status = "okay";
62*4882a593Smuzhiyun	clock-frequency = <400000>;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	hdmi@39 {
65*4882a593Smuzhiyun		compatible = "adi,adv7511w";
66*4882a593Smuzhiyun		reg = <0x39>;
67*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
68*4882a593Smuzhiyun		interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
69*4882a593Smuzhiyun		clocks = <&cec_clock>;
70*4882a593Smuzhiyun		clock-names = "cec";
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		adi,input-depth = <8>;
73*4882a593Smuzhiyun		adi,input-colorspace = "rgb";
74*4882a593Smuzhiyun		adi,input-clock = "1x";
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun		ports {
77*4882a593Smuzhiyun			#address-cells = <1>;
78*4882a593Smuzhiyun			#size-cells = <0>;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun			port@0 {
81*4882a593Smuzhiyun				reg = <0>;
82*4882a593Smuzhiyun				adv7511_in: endpoint {
83*4882a593Smuzhiyun					remote-endpoint = <&du_out_rgb>;
84*4882a593Smuzhiyun				};
85*4882a593Smuzhiyun			};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun			port@1 {
88*4882a593Smuzhiyun				reg = <1>;
89*4882a593Smuzhiyun				adv7511_out: endpoint {
90*4882a593Smuzhiyun					remote-endpoint = <&hdmi_con_out>;
91*4882a593Smuzhiyun				};
92*4882a593Smuzhiyun			};
93*4882a593Smuzhiyun		};
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun&pfc {
98*4882a593Smuzhiyun	can1_pins: can1 {
99*4882a593Smuzhiyun		groups = "can1_data_d";
100*4882a593Smuzhiyun		function = "can1";
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun	du_pins: du {
104*4882a593Smuzhiyun		groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
105*4882a593Smuzhiyun		function = "du";
106*4882a593Smuzhiyun	};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun	hscif1_pins: hscif1 {
109*4882a593Smuzhiyun		groups = "hscif1_data_c", "hscif1_ctrl_c";
110*4882a593Smuzhiyun		function = "hscif1";
111*4882a593Smuzhiyun	};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	scif1_pins: scif1 {
114*4882a593Smuzhiyun		groups = "scif1_data_d";
115*4882a593Smuzhiyun		function = "scif1";
116*4882a593Smuzhiyun	};
117*4882a593Smuzhiyun};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun&scif1 {
120*4882a593Smuzhiyun	pinctrl-0 = <&scif1_pins>;
121*4882a593Smuzhiyun	pinctrl-names = "default";
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun	status = "okay";
124*4882a593Smuzhiyun};
125