1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for the iWave-RZ/G1M/G1N Qseven carrier board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2017 Renesas Electronics Corp. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/* 9*4882a593Smuzhiyun * SSI-SGTL5000 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * This command is required when Playback/Capture 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * amixer set "DVC Out" 100% 14*4882a593Smuzhiyun * amixer set "DVC In" 100% 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * You can use Mute 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * amixer set "DVC Out Mute" on 19*4882a593Smuzhiyun * amixer set "DVC In Mute" on 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * You can use Volume Ramp 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24*4882a593Smuzhiyun * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25*4882a593Smuzhiyun * amixer set "DVC Out Ramp" on 26*4882a593Smuzhiyun * aplay xxx.wav & 27*4882a593Smuzhiyun * amixer set "DVC Out" 80% // Volume Down 28*4882a593Smuzhiyun * amixer set "DVC Out" 100% // Volume Up 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun/ { 32*4882a593Smuzhiyun aliases { 33*4882a593Smuzhiyun serial0 = &scif0; 34*4882a593Smuzhiyun serial3 = &scifb1; 35*4882a593Smuzhiyun ethernet0 = &avb; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun chosen { 39*4882a593Smuzhiyun bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; 40*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun audio_clock: audio_clock { 44*4882a593Smuzhiyun compatible = "fixed-clock"; 45*4882a593Smuzhiyun #clock-cells = <0>; 46*4882a593Smuzhiyun clock-frequency = <26000000>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun lcd_backlight: backlight { 50*4882a593Smuzhiyun compatible = "pwm-backlight"; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun pwms = <&pwm3 0 5000000 0>; 53*4882a593Smuzhiyun brightness-levels = <0 4 8 16 32 64 128 255>; 54*4882a593Smuzhiyun default-brightness-level = <7>; 55*4882a593Smuzhiyun enable-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun lvds-receiver { 59*4882a593Smuzhiyun compatible = "ti,ds90cf384a", "lvds-decoder"; 60*4882a593Smuzhiyun power-supply = <&vcc_3v3_tft1>; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun ports { 63*4882a593Smuzhiyun #address-cells = <1>; 64*4882a593Smuzhiyun #size-cells = <0>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun port@0 { 67*4882a593Smuzhiyun reg = <0>; 68*4882a593Smuzhiyun lvds_receiver_in: endpoint { 69*4882a593Smuzhiyun remote-endpoint = <&lvds0_out>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun port@1 { 73*4882a593Smuzhiyun reg = <1>; 74*4882a593Smuzhiyun lvds_receiver_out: endpoint { 75*4882a593Smuzhiyun remote-endpoint = <&panel_in>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun panel { 82*4882a593Smuzhiyun compatible = "edt,etm0700g0dh6"; 83*4882a593Smuzhiyun backlight = <&lcd_backlight>; 84*4882a593Smuzhiyun power-supply = <&vcc_3v3_tft1>; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun port { 87*4882a593Smuzhiyun panel_in: endpoint { 88*4882a593Smuzhiyun remote-endpoint = <&lvds_receiver_out>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun reg_1p5v: 1p5v { 94*4882a593Smuzhiyun compatible = "regulator-fixed"; 95*4882a593Smuzhiyun regulator-name = "1P5V"; 96*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 97*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 98*4882a593Smuzhiyun regulator-always-on; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun rsnd_sgtl5000: sound { 102*4882a593Smuzhiyun compatible = "simple-audio-card"; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 105*4882a593Smuzhiyun simple-audio-card,bitclock-master = <&sndcodec>; 106*4882a593Smuzhiyun simple-audio-card,frame-master = <&sndcodec>; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun sndcpu: simple-audio-card,cpu { 109*4882a593Smuzhiyun sound-dai = <&rcar_sound>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun sndcodec: simple-audio-card,codec { 113*4882a593Smuzhiyun sound-dai = <&sgtl5000>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun vcc_3v3_tft1: regulator-panel { 118*4882a593Smuzhiyun compatible = "regulator-fixed"; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun regulator-name = "vcc-3v3-tft1"; 121*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 122*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 123*4882a593Smuzhiyun enable-active-high; 124*4882a593Smuzhiyun startup-delay-us = <500>; 125*4882a593Smuzhiyun gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun vcc_sdhi1: regulator-vcc-sdhi1 { 129*4882a593Smuzhiyun compatible = "regulator-fixed"; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun regulator-name = "SDHI1 Vcc"; 132*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 133*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun gpio = <&gpio1 16 GPIO_ACTIVE_LOW>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun vccq_sdhi1: regulator-vccq-sdhi1 { 139*4882a593Smuzhiyun compatible = "regulator-gpio"; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun regulator-name = "SDHI1 VccQ"; 142*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 143*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; 146*4882a593Smuzhiyun gpios-states = <1>; 147*4882a593Smuzhiyun states = <3300000 1>, <1800000 0>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun}; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun&avb { 152*4882a593Smuzhiyun pinctrl-0 = <&avb_pins>; 153*4882a593Smuzhiyun pinctrl-names = "default"; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun phy-handle = <&phy3>; 156*4882a593Smuzhiyun phy-mode = "gmii"; 157*4882a593Smuzhiyun renesas,no-ether-link; 158*4882a593Smuzhiyun status = "okay"; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun phy3: ethernet-phy@3 { 161*4882a593Smuzhiyun reg = <3>; 162*4882a593Smuzhiyun micrel,led-mode = <1>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun}; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun&can0 { 167*4882a593Smuzhiyun pinctrl-0 = <&can0_pins>; 168*4882a593Smuzhiyun pinctrl-names = "default"; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun status = "okay"; 171*4882a593Smuzhiyun}; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun&cmt0 { 174*4882a593Smuzhiyun status = "okay"; 175*4882a593Smuzhiyun}; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun&du { 178*4882a593Smuzhiyun status = "okay"; 179*4882a593Smuzhiyun}; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun&gpio2 { 182*4882a593Smuzhiyun touch-interrupt { 183*4882a593Smuzhiyun gpio-hog; 184*4882a593Smuzhiyun gpios = <12 GPIO_ACTIVE_LOW>; 185*4882a593Smuzhiyun input; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun}; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun&hsusb { 190*4882a593Smuzhiyun status = "okay"; 191*4882a593Smuzhiyun pinctrl-0 = <&usb0_pins>; 192*4882a593Smuzhiyun pinctrl-names = "default"; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&i2c2 { 196*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins>; 197*4882a593Smuzhiyun pinctrl-names = "default"; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun status = "okay"; 200*4882a593Smuzhiyun clock-frequency = <400000>; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun rtc@68 { 203*4882a593Smuzhiyun compatible = "ti,bq32000"; 204*4882a593Smuzhiyun reg = <0x68>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun sgtl5000: codec@a { 208*4882a593Smuzhiyun compatible = "fsl,sgtl5000"; 209*4882a593Smuzhiyun #sound-dai-cells = <0>; 210*4882a593Smuzhiyun reg = <0x0a>; 211*4882a593Smuzhiyun clocks = <&audio_clock>; 212*4882a593Smuzhiyun VDDA-supply = <®_3p3v>; 213*4882a593Smuzhiyun VDDIO-supply = <®_3p3v>; 214*4882a593Smuzhiyun VDDD-supply = <®_1p5v>; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun touch: touchpanel@38 { 218*4882a593Smuzhiyun compatible = "edt,edt-ft5406"; 219*4882a593Smuzhiyun reg = <0x38>; 220*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 221*4882a593Smuzhiyun interrupts = <12 IRQ_TYPE_EDGE_FALLING>; 222*4882a593Smuzhiyun vcc-supply = <&vcc_3v3_tft1>; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun}; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun&lvds0 { 227*4882a593Smuzhiyun status = "okay"; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun ports { 230*4882a593Smuzhiyun port@1 { 231*4882a593Smuzhiyun lvds0_out: endpoint { 232*4882a593Smuzhiyun remote-endpoint = <&lvds_receiver_in>; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun}; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun&pci0 { 239*4882a593Smuzhiyun pinctrl-0 = <&usb0_pins>; 240*4882a593Smuzhiyun pinctrl-names = "default"; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&pci1 { 244*4882a593Smuzhiyun status = "okay"; 245*4882a593Smuzhiyun pinctrl-0 = <&usb1_pins>; 246*4882a593Smuzhiyun pinctrl-names = "default"; 247*4882a593Smuzhiyun}; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun&pcie_bus_clk { 250*4882a593Smuzhiyun clock-frequency = <100000000>; 251*4882a593Smuzhiyun}; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun&pfc { 254*4882a593Smuzhiyun can0_pins: can0 { 255*4882a593Smuzhiyun groups = "can0_data_d"; 256*4882a593Smuzhiyun function = "can0"; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun avb_pins: avb { 260*4882a593Smuzhiyun groups = "avb_mdio", "avb_gmii"; 261*4882a593Smuzhiyun function = "avb"; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun i2c2_pins: i2c2 { 265*4882a593Smuzhiyun groups = "i2c2"; 266*4882a593Smuzhiyun function = "i2c2"; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun pwm3_pins: pwm3 { 270*4882a593Smuzhiyun groups = "pwm3"; 271*4882a593Smuzhiyun function = "pwm3"; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun scif0_pins: scif0 { 275*4882a593Smuzhiyun groups = "scif0_data_d"; 276*4882a593Smuzhiyun function = "scif0"; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun scifb1_pins: scifb1 { 280*4882a593Smuzhiyun groups = "scifb1_data_d", "scifb1_ctrl"; 281*4882a593Smuzhiyun function = "scifb1"; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun sdhi1_pins: sd1 { 285*4882a593Smuzhiyun groups = "sdhi1_data4", "sdhi1_ctrl"; 286*4882a593Smuzhiyun function = "sdhi1"; 287*4882a593Smuzhiyun power-source = <3300>; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun sdhi1_pins_uhs: sd1_uhs { 291*4882a593Smuzhiyun groups = "sdhi1_data4", "sdhi1_ctrl"; 292*4882a593Smuzhiyun function = "sdhi1"; 293*4882a593Smuzhiyun power-source = <1800>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun sound_pins: sound { 297*4882a593Smuzhiyun groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; 298*4882a593Smuzhiyun function = "ssi"; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun usb0_pins: usb0 { 302*4882a593Smuzhiyun groups = "usb0"; 303*4882a593Smuzhiyun function = "usb0"; 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun usb1_pins: usb1 { 307*4882a593Smuzhiyun groups = "usb1"; 308*4882a593Smuzhiyun function = "usb1"; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun}; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun&pwm3 { 313*4882a593Smuzhiyun pinctrl-0 = <&pwm3_pins>; 314*4882a593Smuzhiyun pinctrl-names = "default"; 315*4882a593Smuzhiyun status = "okay"; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&rcar_sound { 319*4882a593Smuzhiyun pinctrl-0 = <&sound_pins>; 320*4882a593Smuzhiyun pinctrl-names = "default"; 321*4882a593Smuzhiyun status = "okay"; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun /* Single DAI */ 324*4882a593Smuzhiyun #sound-dai-cells = <0>; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun rcar_sound,dai { 327*4882a593Smuzhiyun dai0 { 328*4882a593Smuzhiyun playback = <&ssi1 &src3 &dvc1>; 329*4882a593Smuzhiyun capture = <&ssi0 &src2 &dvc0>; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun }; 332*4882a593Smuzhiyun}; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun&rwdt { 335*4882a593Smuzhiyun timeout-sec = <60>; 336*4882a593Smuzhiyun status = "okay"; 337*4882a593Smuzhiyun}; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun&scif0 { 340*4882a593Smuzhiyun pinctrl-0 = <&scif0_pins>; 341*4882a593Smuzhiyun pinctrl-names = "default"; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun status = "okay"; 344*4882a593Smuzhiyun}; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun&scifb1 { 347*4882a593Smuzhiyun pinctrl-0 = <&scifb1_pins>; 348*4882a593Smuzhiyun pinctrl-names = "default"; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun uart-has-rtscts; 351*4882a593Smuzhiyun status = "okay"; 352*4882a593Smuzhiyun}; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun&sdhi1 { 355*4882a593Smuzhiyun pinctrl-0 = <&sdhi1_pins>; 356*4882a593Smuzhiyun pinctrl-1 = <&sdhi1_pins_uhs>; 357*4882a593Smuzhiyun pinctrl-names = "default", "state_uhs"; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun vmmc-supply = <&vcc_sdhi1>; 360*4882a593Smuzhiyun vqmmc-supply = <&vccq_sdhi1>; 361*4882a593Smuzhiyun cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; 362*4882a593Smuzhiyun wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; 363*4882a593Smuzhiyun sd-uhs-sdr50; 364*4882a593Smuzhiyun status = "okay"; 365*4882a593Smuzhiyun}; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun&ssi1 { 368*4882a593Smuzhiyun shared-pin; 369*4882a593Smuzhiyun}; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun&usbphy { 372*4882a593Smuzhiyun status = "okay"; 373*4882a593Smuzhiyun}; 374