1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * SoC core Device Tree for the ARM Integrator platforms 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/ { 7*4882a593Smuzhiyun #address-cells = <1>; 8*4882a593Smuzhiyun #size-cells = <1>; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun memory { 11*4882a593Smuzhiyun device_type = "memory"; 12*4882a593Smuzhiyun reg = <0x0 0x0>; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun core-module@10000000 { 16*4882a593Smuzhiyun compatible = "arm,core-module-integrator", "syscon", "simple-mfd"; 17*4882a593Smuzhiyun reg = <0x10000000 0x200>; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* Use core module LED to indicate CPU load */ 20*4882a593Smuzhiyun led@c.0 { 21*4882a593Smuzhiyun compatible = "register-bit-led"; 22*4882a593Smuzhiyun offset = <0x0c>; 23*4882a593Smuzhiyun mask = <0x01>; 24*4882a593Smuzhiyun label = "integrator:core_module"; 25*4882a593Smuzhiyun linux,default-trigger = "cpu0"; 26*4882a593Smuzhiyun default-state = "on"; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun ebi@12000000 { 31*4882a593Smuzhiyun compatible = "arm,external-bus-interface"; 32*4882a593Smuzhiyun reg = <0x12000000 0x100>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun timer@13000000 { 36*4882a593Smuzhiyun reg = <0x13000000 0x100>; 37*4882a593Smuzhiyun interrupt-parent = <&pic>; 38*4882a593Smuzhiyun interrupts = <5>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun timer@13000100 { 42*4882a593Smuzhiyun reg = <0x13000100 0x100>; 43*4882a593Smuzhiyun interrupt-parent = <&pic>; 44*4882a593Smuzhiyun interrupts = <6>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun timer@13000200 { 48*4882a593Smuzhiyun reg = <0x13000200 0x100>; 49*4882a593Smuzhiyun interrupt-parent = <&pic>; 50*4882a593Smuzhiyun interrupts = <7>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun pic@14000000 { 54*4882a593Smuzhiyun compatible = "arm,versatile-fpga-irq"; 55*4882a593Smuzhiyun #interrupt-cells = <1>; 56*4882a593Smuzhiyun interrupt-controller; 57*4882a593Smuzhiyun reg = <0x14000000 0x100>; 58*4882a593Smuzhiyun clear-mask = <0xffffffff>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun flash@24000000 { 62*4882a593Smuzhiyun compatible = "arm,versatile-flash", "cfi-flash"; 63*4882a593Smuzhiyun reg = <0x24000000 0x02000000>; 64*4882a593Smuzhiyun bank-width = <4>; 65*4882a593Smuzhiyun partitions { 66*4882a593Smuzhiyun compatible = "arm,arm-firmware-suite"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun fpga { 71*4882a593Smuzhiyun compatible = "simple-bus"; 72*4882a593Smuzhiyun #address-cells = <1>; 73*4882a593Smuzhiyun #size-cells = <1>; 74*4882a593Smuzhiyun ranges; 75*4882a593Smuzhiyun interrupt-parent = <&pic>; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* 78*4882a593Smuzhiyun * These PrimeCells are in the same locations and using the 79*4882a593Smuzhiyun * same interrupts in all Integrators, however the silicon 80*4882a593Smuzhiyun * version deployed is different. 81*4882a593Smuzhiyun */ 82*4882a593Smuzhiyun rtc@15000000 { 83*4882a593Smuzhiyun reg = <0x15000000 0x1000>; 84*4882a593Smuzhiyun interrupts = <8>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun uart@16000000 { 88*4882a593Smuzhiyun reg = <0x16000000 0x1000>; 89*4882a593Smuzhiyun interrupts = <1>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun uart@17000000 { 93*4882a593Smuzhiyun reg = <0x17000000 0x1000>; 94*4882a593Smuzhiyun interrupts = <2>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun kmi@18000000 { 98*4882a593Smuzhiyun reg = <0x18000000 0x1000>; 99*4882a593Smuzhiyun interrupts = <3>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun kmi@19000000 { 103*4882a593Smuzhiyun reg = <0x19000000 0x1000>; 104*4882a593Smuzhiyun interrupts = <4>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun syscon { 108*4882a593Smuzhiyun /* Debug registers mapped as syscon */ 109*4882a593Smuzhiyun compatible = "syscon", "simple-mfd"; 110*4882a593Smuzhiyun reg = <0x1a000000 0x10>; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun led@4.0 { 113*4882a593Smuzhiyun compatible = "register-bit-led"; 114*4882a593Smuzhiyun offset = <0x04>; 115*4882a593Smuzhiyun mask = <0x01>; 116*4882a593Smuzhiyun label = "integrator:green0"; 117*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 118*4882a593Smuzhiyun default-state = "on"; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun led@4.1 { 121*4882a593Smuzhiyun compatible = "register-bit-led"; 122*4882a593Smuzhiyun offset = <0x04>; 123*4882a593Smuzhiyun mask = <0x02>; 124*4882a593Smuzhiyun label = "integrator:yellow"; 125*4882a593Smuzhiyun default-state = "off"; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun led@4.2 { 128*4882a593Smuzhiyun compatible = "register-bit-led"; 129*4882a593Smuzhiyun offset = <0x04>; 130*4882a593Smuzhiyun mask = <0x04>; 131*4882a593Smuzhiyun label = "integrator:red"; 132*4882a593Smuzhiyun default-state = "off"; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun led@4.3 { 135*4882a593Smuzhiyun compatible = "register-bit-led"; 136*4882a593Smuzhiyun offset = <0x04>; 137*4882a593Smuzhiyun mask = <0x08>; 138*4882a593Smuzhiyun label = "integrator:green1"; 139*4882a593Smuzhiyun default-state = "off"; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun}; 144