1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright 2016 Freescale Semiconductor, Inc. 4*4882a593Smuzhiyun * Copyright 2017-2018 NXP 5*4882a593Smuzhiyun * Dong Aisheng <aisheng.dong@nxp.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "imx7ulp.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "NXP i.MX7ULP EVK"; 14*4882a593Smuzhiyun compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun stdout-path = &lpuart4; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@60000000 { 21*4882a593Smuzhiyun device_type = "memory"; 22*4882a593Smuzhiyun reg = <0x60000000 0x40000000>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun backlight { 26*4882a593Smuzhiyun compatible = "pwm-backlight"; 27*4882a593Smuzhiyun pwms = <&tpm4 1 50000 0>; 28*4882a593Smuzhiyun brightness-levels = <0 20 25 30 35 40 100>; 29*4882a593Smuzhiyun default-brightness-level = <6>; 30*4882a593Smuzhiyun status = "okay"; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun reg_usb_otg1_vbus: regulator-usb-otg1-vbus { 34*4882a593Smuzhiyun compatible = "regulator-fixed"; 35*4882a593Smuzhiyun pinctrl-names = "default"; 36*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbotg1_vbus>; 37*4882a593Smuzhiyun regulator-name = "usb_otg1_vbus"; 38*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 39*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 40*4882a593Smuzhiyun gpio = <&gpio_ptc 0 GPIO_ACTIVE_HIGH>; 41*4882a593Smuzhiyun enable-active-high; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun reg_vsd_3v3: regulator-vsd-3v3 { 45*4882a593Smuzhiyun compatible = "regulator-fixed"; 46*4882a593Smuzhiyun regulator-name = "VSD_3V3"; 47*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 48*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 49*4882a593Smuzhiyun pinctrl-names = "default"; 50*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc0_rst>; 51*4882a593Smuzhiyun gpio = <&gpio_ptd 0 GPIO_ACTIVE_HIGH>; 52*4882a593Smuzhiyun enable-active-high; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun}; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun&lpuart4 { 57*4882a593Smuzhiyun pinctrl-names = "default"; 58*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_lpuart4>; 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&tpm4 { 63*4882a593Smuzhiyun pinctrl-names = "default"; 64*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0>; 65*4882a593Smuzhiyun status = "okay"; 66*4882a593Smuzhiyun}; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun&usbotg1 { 69*4882a593Smuzhiyun vbus-supply = <®_usb_otg1_vbus>; 70*4882a593Smuzhiyun pinctrl-names = "default"; 71*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbotg1_id>; 72*4882a593Smuzhiyun srp-disable; 73*4882a593Smuzhiyun hnp-disable; 74*4882a593Smuzhiyun adp-disable; 75*4882a593Smuzhiyun disable-over-current; 76*4882a593Smuzhiyun status = "okay"; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&usdhc0 { 80*4882a593Smuzhiyun assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>; 81*4882a593Smuzhiyun assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>; 82*4882a593Smuzhiyun pinctrl-names = "default"; 83*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc0>; 84*4882a593Smuzhiyun cd-gpios = <&gpio_ptc 10 GPIO_ACTIVE_LOW>; 85*4882a593Smuzhiyun vmmc-supply = <®_vsd_3v3>; 86*4882a593Smuzhiyun status = "okay"; 87*4882a593Smuzhiyun}; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun&iomuxc1 { 90*4882a593Smuzhiyun pinctrl_lpuart4: lpuart4grp { 91*4882a593Smuzhiyun fsl,pins = < 92*4882a593Smuzhiyun IMX7ULP_PAD_PTC3__LPUART4_RX 0x3 93*4882a593Smuzhiyun IMX7ULP_PAD_PTC2__LPUART4_TX 0x3 94*4882a593Smuzhiyun >; 95*4882a593Smuzhiyun bias-pull-up; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun pinctrl_pwm0: pwm0grp { 99*4882a593Smuzhiyun fsl,pins = < 100*4882a593Smuzhiyun IMX7ULP_PAD_PTF2__TPM4_CH1 0x2 101*4882a593Smuzhiyun >; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun pinctrl_usbotg1_vbus: otg1vbusgrp { 105*4882a593Smuzhiyun fsl,pins = < 106*4882a593Smuzhiyun IMX7ULP_PAD_PTC0__PTC0 0x20000 107*4882a593Smuzhiyun >; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun pinctrl_usbotg1_id: otg1idgrp { 111*4882a593Smuzhiyun fsl,pins = < 112*4882a593Smuzhiyun IMX7ULP_PAD_PTC13__USB0_ID 0x10003 113*4882a593Smuzhiyun >; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun pinctrl_usdhc0: usdhc0grp { 117*4882a593Smuzhiyun fsl,pins = < 118*4882a593Smuzhiyun IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 119*4882a593Smuzhiyun IMX7ULP_PAD_PTD2__SDHC0_CLK 0x40 120*4882a593Smuzhiyun IMX7ULP_PAD_PTD7__SDHC0_D3 0x43 121*4882a593Smuzhiyun IMX7ULP_PAD_PTD8__SDHC0_D2 0x43 122*4882a593Smuzhiyun IMX7ULP_PAD_PTD9__SDHC0_D1 0x43 123*4882a593Smuzhiyun IMX7ULP_PAD_PTD10__SDHC0_D0 0x43 124*4882a593Smuzhiyun IMX7ULP_PAD_PTC10__PTC10 0x3 /* CD */ 125*4882a593Smuzhiyun >; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun pinctrl_usdhc0_rst: usdhc0-gpio-rst-grp { 129*4882a593Smuzhiyun fsl,pins = < 130*4882a593Smuzhiyun IMX7ULP_PAD_PTD0__PTD0 0x3 131*4882a593Smuzhiyun >; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun}; 134