1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Copyright 2017 NXP 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun#include "imx7d-pico.dtsi" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "TechNexion PICO-IMX7D Board using Hobbit baseboard"; 9*4882a593Smuzhiyun compatible = "technexion,imx7d-pico-hobbit", "fsl,imx7d"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun leds { 12*4882a593Smuzhiyun compatible = "gpio-leds"; 13*4882a593Smuzhiyun pinctrl-names = "default"; 14*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_gpio_leds>; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun led { 17*4882a593Smuzhiyun label = "gpio-led"; 18*4882a593Smuzhiyun gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun sound { 23*4882a593Smuzhiyun compatible = "simple-audio-card"; 24*4882a593Smuzhiyun simple-audio-card,name = "imx7-sgtl5000"; 25*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 26*4882a593Smuzhiyun simple-audio-card,bitclock-master = <&dailink_master>; 27*4882a593Smuzhiyun simple-audio-card,frame-master = <&dailink_master>; 28*4882a593Smuzhiyun simple-audio-card,cpu { 29*4882a593Smuzhiyun sound-dai = <&sai1>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun dailink_master: simple-audio-card,codec { 33*4882a593Smuzhiyun sound-dai = <&sgtl5000>; 34*4882a593Smuzhiyun clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun&i2c1 { 40*4882a593Smuzhiyun sgtl5000: codec@a { 41*4882a593Smuzhiyun #sound-dai-cells = <0>; 42*4882a593Smuzhiyun reg = <0x0a>; 43*4882a593Smuzhiyun compatible = "fsl,sgtl5000"; 44*4882a593Smuzhiyun clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 45*4882a593Smuzhiyun VDDA-supply = <®_2p5v>; 46*4882a593Smuzhiyun VDDIO-supply = <®_vref_1v8>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&i2c4 { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun adc081c: adc@50 { 54*4882a593Smuzhiyun compatible = "ti,adc081c"; 55*4882a593Smuzhiyun reg = <0x50>; 56*4882a593Smuzhiyun vref-supply = <®_3p3v>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun}; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun&ecspi3 { 61*4882a593Smuzhiyun ads7846@0 { 62*4882a593Smuzhiyun reg = <0>; 63*4882a593Smuzhiyun compatible = "ti,ads7846"; 64*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 65*4882a593Smuzhiyun interrupts = <7 0>; 66*4882a593Smuzhiyun spi-max-frequency = <1000000>; 67*4882a593Smuzhiyun pendown-gpio = <&gpio2 7 0>; 68*4882a593Smuzhiyun vcc-supply = <®_3p3v>; 69*4882a593Smuzhiyun ti,x-min = /bits/ 16 <0>; 70*4882a593Smuzhiyun ti,x-max = /bits/ 16 <4095>; 71*4882a593Smuzhiyun ti,y-min = /bits/ 16 <0>; 72*4882a593Smuzhiyun ti,y-max = /bits/ 16 <4095>; 73*4882a593Smuzhiyun ti,pressure-max = /bits/ 16 <1024>; 74*4882a593Smuzhiyun ti,x-plate-ohms = /bits/ 16 <90>; 75*4882a593Smuzhiyun ti,y-plate-ohms = /bits/ 16 <90>; 76*4882a593Smuzhiyun ti,debounce-max = /bits/ 16 <70>; 77*4882a593Smuzhiyun ti,debounce-tol = /bits/ 16 <3>; 78*4882a593Smuzhiyun ti,debounce-rep = /bits/ 16 <2>; 79*4882a593Smuzhiyun ti,settle-delay-usec = /bits/ 16 <150>; 80*4882a593Smuzhiyun wakeup-source; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun}; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun&iomuxc { 85*4882a593Smuzhiyun pinctrl-names = "default"; 86*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hog>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun pinctrl_hog: hoggrp { 89*4882a593Smuzhiyun fsl,pins = < 90*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 91*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 92*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 93*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA03__GPIO2_IO3 0x14 94*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x14 95*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 96*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 97*4882a593Smuzhiyun >; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun pinctrl_gpio_leds: gpioledsgrp { 101*4882a593Smuzhiyun fsl,pins = < 102*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 103*4882a593Smuzhiyun >; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun}; 106