1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Copyright 2015 Technexion Ltd. 4*4882a593Smuzhiyun// 5*4882a593Smuzhiyun// Author: Wig Cheng <wig.cheng@technexion.com> 6*4882a593Smuzhiyun// Richard Hu <richard.hu@technexion.com> 7*4882a593Smuzhiyun// Tapani Utriainen <tapani@technexion.com> 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "imx7d-pico.dtsi" 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "TechNexion PICO-IMX7D and DWARF baseboard"; 13*4882a593Smuzhiyun compatible = "technexion,imx7d-pico-dwarf", "fsl,imx7d"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun sound { 16*4882a593Smuzhiyun compatible = "fsl,imx-audio-sgtl5000"; 17*4882a593Smuzhiyun model = "imx7d-sgtl5000"; 18*4882a593Smuzhiyun audio-cpu = <&sai1>; 19*4882a593Smuzhiyun audio-codec = <&sgtl5000>; 20*4882a593Smuzhiyun audio-routing = 21*4882a593Smuzhiyun "LINE_IN", "Line In Jack", 22*4882a593Smuzhiyun "MIC_IN", "Mic Jack", 23*4882a593Smuzhiyun "Mic Jack", "Mic Bias", 24*4882a593Smuzhiyun "Headphone Jack", "HP_OUT"; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun sys_mclk: clock-sys-mclk { 28*4882a593Smuzhiyun compatible = "fixed-clock"; 29*4882a593Smuzhiyun #clock-cells = <0>; 30*4882a593Smuzhiyun clock-frequency = <24576000>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun}; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun&i2c1 { 35*4882a593Smuzhiyun clock_frequency = <100000>; 36*4882a593Smuzhiyun pinctrl-names = "default"; 37*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c1>; 38*4882a593Smuzhiyun status = "okay"; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun sgtl5000: audio-codec@a { 41*4882a593Smuzhiyun reg = <0x0a>; 42*4882a593Smuzhiyun compatible = "fsl,sgtl5000"; 43*4882a593Smuzhiyun clocks = <&sys_mclk>; 44*4882a593Smuzhiyun VDDA-supply = <®_2p5v>; 45*4882a593Smuzhiyun VDDIO-supply = <®_3p3v>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun pressure-sensor@60 { 49*4882a593Smuzhiyun compatible = "fsl,mpl3115"; 50*4882a593Smuzhiyun reg = <0x60>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&i2c4 { 55*4882a593Smuzhiyun clock_frequency = <100000>; 56*4882a593Smuzhiyun pinctrl-names = "default"; 57*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c1>; 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun pca9554: io-expander@25 { 61*4882a593Smuzhiyun compatible = "nxp,pca9554"; 62*4882a593Smuzhiyun gpio-controller; 63*4882a593Smuzhiyun #gpio-cells = <2>; 64*4882a593Smuzhiyun #interrupt-cells = <2>; 65*4882a593Smuzhiyun reg = <0x25>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun touchscreen@38 { 69*4882a593Smuzhiyun compatible = "edt,edt-ft5x06"; 70*4882a593Smuzhiyun reg = <0x38>; 71*4882a593Smuzhiyun pinctrl-names = "default"; 72*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_touchscreen>; 73*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 74*4882a593Smuzhiyun interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 75*4882a593Smuzhiyun reset-gpios = <&pca9554 4 GPIO_ACTIVE_LOW>; 76*4882a593Smuzhiyun touchscreen-size-x = <800>; 77*4882a593Smuzhiyun touchscreen-size-y = <480>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun}; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun&iomuxc { 82*4882a593Smuzhiyun pinctrl_touchscreen: touchscreengrp { 83*4882a593Smuzhiyun fsl,pins = < 84*4882a593Smuzhiyun MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 85*4882a593Smuzhiyun >; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun}; 88