1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright 2015 Lothar Waßmann <LW@KARO-electronics.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License 11*4882a593Smuzhiyun * version 2 as published by the Free Software Foundation. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 14*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*4882a593Smuzhiyun * GNU General Public License for more details. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * Or, alternatively, 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 21*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 22*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 23*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 24*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 25*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 26*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 27*4882a593Smuzhiyun * conditions: 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 30*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 31*4882a593Smuzhiyun * 32*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 33*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 37*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun/dts-v1/; 43*4882a593Smuzhiyun#include "imx6ul.dtsi" 44*4882a593Smuzhiyun#include "imx6ul-tx6ul.dtsi" 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun/ { 47*4882a593Smuzhiyun model = "Ka-Ro electronics TXUL-0010 Module on TXUL Mainboard"; 48*4882a593Smuzhiyun compatible = "karo,imx6ul-tx6ul", "fsl,imx6ul"; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun aliases { 51*4882a593Smuzhiyun lcdif-24bit-pins-a = &pinctrl_disp0_3; 52*4882a593Smuzhiyun mmc0 = &usdhc1; 53*4882a593Smuzhiyun /delete-property/ mmc1; 54*4882a593Smuzhiyun serial2 = &uart3; 55*4882a593Smuzhiyun serial4 = &uart5; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun /delete-node/ sound; 58*4882a593Smuzhiyun}; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun&can1 { 61*4882a593Smuzhiyun xceiver-supply = <®_3v3>; 62*4882a593Smuzhiyun}; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun&can2 { 65*4882a593Smuzhiyun xceiver-supply = <®_3v3>; 66*4882a593Smuzhiyun}; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun&ds1339 { 69*4882a593Smuzhiyun status = "disabled"; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&fec1 { 73*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_enet1 &pinctrl_etnphy0_rst>; 74*4882a593Smuzhiyun /delete-node/ mdio; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&fec2 { 78*4882a593Smuzhiyun pinctrl-names = "default"; 79*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio &pinctrl_etnphy1_rst>; 80*4882a593Smuzhiyun phy-mode = "rmii"; 81*4882a593Smuzhiyun phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 82*4882a593Smuzhiyun phy-supply = <®_3v3_etn>; 83*4882a593Smuzhiyun phy-handle = <&etnphy1>; 84*4882a593Smuzhiyun status = "okay"; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun mdio { 87*4882a593Smuzhiyun #address-cells = <1>; 88*4882a593Smuzhiyun #size-cells = <0>; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun etnphy0: ethernet-phy@0 { 91*4882a593Smuzhiyun compatible = "ethernet-phy-ieee802.3-c22"; 92*4882a593Smuzhiyun reg = <0>; 93*4882a593Smuzhiyun pinctrl-names = "default"; 94*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_etnphy0_int>; 95*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 96*4882a593Smuzhiyun interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 97*4882a593Smuzhiyun interrupts-extended = <&gpio5 5 IRQ_TYPE_EDGE_FALLING>; 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun etnphy1: ethernet-phy@2 { 102*4882a593Smuzhiyun compatible = "ethernet-phy-ieee802.3-c22"; 103*4882a593Smuzhiyun reg = <2>; 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_etnphy1_int>; 106*4882a593Smuzhiyun interrupt-parent = <&gpio4>; 107*4882a593Smuzhiyun interrupts = <27 IRQ_TYPE_EDGE_FALLING>; 108*4882a593Smuzhiyun interrupts-extended = <&gpio4 27 IRQ_TYPE_EDGE_FALLING>; 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun}; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun&i2c_gpio { 115*4882a593Smuzhiyun status = "disabled"; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&i2c2 { 119*4882a593Smuzhiyun /delete-node/ codec@a; 120*4882a593Smuzhiyun /delete-node/ touchscreen@48; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun rtc: mcp7940x@6f { 123*4882a593Smuzhiyun compatible = "microchip,mcp7940x"; 124*4882a593Smuzhiyun reg = <0x6f>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun}; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun&kpp { 129*4882a593Smuzhiyun status = "disabled"; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&lcdif { 133*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_disp0_3>; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun®_usbotg_vbus{ 137*4882a593Smuzhiyun status = "disabled"; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&usdhc1 { 141*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc1>; 142*4882a593Smuzhiyun non-removable; 143*4882a593Smuzhiyun /delete-property/ cd-gpios; 144*4882a593Smuzhiyun cap-sdio-irq; 145*4882a593Smuzhiyun}; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun&uart1 { 148*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart1>; 149*4882a593Smuzhiyun /delete-property/ uart-has-rtscts; 150*4882a593Smuzhiyun}; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun&uart2 { 153*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart2>; 154*4882a593Smuzhiyun /delete-property/ uart-has-rtscts; 155*4882a593Smuzhiyun status = "okay"; 156*4882a593Smuzhiyun}; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun&uart3 { 159*4882a593Smuzhiyun pinctrl-names = "default"; 160*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart3>; 161*4882a593Smuzhiyun status = "okay"; 162*4882a593Smuzhiyun}; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun&uart4 { 165*4882a593Smuzhiyun pinctrl-names = "default"; 166*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart4>; 167*4882a593Smuzhiyun status = "okay"; 168*4882a593Smuzhiyun}; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun&uart5 { 171*4882a593Smuzhiyun pinctrl-names = "default"; 172*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart5>; 173*4882a593Smuzhiyun status = "okay"; 174*4882a593Smuzhiyun}; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun&uart6 { 177*4882a593Smuzhiyun pinctrl-names = "default"; 178*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart6>; 179*4882a593Smuzhiyun status = "okay"; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun&uart7 { 183*4882a593Smuzhiyun pinctrl-names = "default"; 184*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart7>; 185*4882a593Smuzhiyun status = "okay"; 186*4882a593Smuzhiyun}; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun&uart8 { 189*4882a593Smuzhiyun pinctrl-names = "default"; 190*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart8>; 191*4882a593Smuzhiyun status = "disabled"; /* conflicts with LCDIF */ 192*4882a593Smuzhiyun}; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun&iomuxc { 195*4882a593Smuzhiyun hoggrp { 196*4882a593Smuzhiyun fsl,pins = < 197*4882a593Smuzhiyun MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x0b0b0 /* WLAN_RESET */ 198*4882a593Smuzhiyun >; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun pinctrl_disp0_3: disp0grp-3 { 202*4882a593Smuzhiyun fsl,pins = < 203*4882a593Smuzhiyun MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x10 /* LSCLK */ 204*4882a593Smuzhiyun MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x10 /* OE_ACD */ 205*4882a593Smuzhiyun MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */ 206*4882a593Smuzhiyun MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x10 /* VSYNC */ 207*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x10 208*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x10 209*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x10 210*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x10 211*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x10 212*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x10 213*4882a593Smuzhiyun /* LCD_DATA08..09 not wired */ 214*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x10 215*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x10 216*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x10 217*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x10 218*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x10 219*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x10 220*4882a593Smuzhiyun /* LCD_DATA16..17 not wired */ 221*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x10 222*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x10 223*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x10 224*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x10 225*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x10 226*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x10 227*4882a593Smuzhiyun >; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun pinctrl_enet2_mdio: enet2-mdiogrp { 231*4882a593Smuzhiyun fsl,pins = < 232*4882a593Smuzhiyun MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x0b0b0 233*4882a593Smuzhiyun MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 234*4882a593Smuzhiyun >; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun pinctrl_uart3: uart3grp { 238*4882a593Smuzhiyun fsl,pins = < 239*4882a593Smuzhiyun MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x0b0b0 240*4882a593Smuzhiyun MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x0b0b0 241*4882a593Smuzhiyun >; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun pinctrl_uart4: uart4grp { 245*4882a593Smuzhiyun fsl,pins = < 246*4882a593Smuzhiyun MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x0b0b0 247*4882a593Smuzhiyun MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x0b0b0 248*4882a593Smuzhiyun >; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun pinctrl_uart6: uart6grp { 252*4882a593Smuzhiyun fsl,pins = < 253*4882a593Smuzhiyun MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x0b0b0 254*4882a593Smuzhiyun MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x0b0b0 255*4882a593Smuzhiyun >; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun pinctrl_uart7: uart7grp { 259*4882a593Smuzhiyun fsl,pins = < 260*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x0b0b0 261*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x0b0b0 262*4882a593Smuzhiyun >; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun pinctrl_uart8: uart8grp { 266*4882a593Smuzhiyun fsl,pins = < 267*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA20__UART8_DCE_TX 0x0b0b0 268*4882a593Smuzhiyun MX6UL_PAD_LCD_DATA21__UART8_DCE_RX 0x0b0b0 269*4882a593Smuzhiyun >; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun}; 272