1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Copyright (C) 2014 Freescale Semiconductor, Inc. 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun#include "imx6sx-sdb.dts" 6*4882a593Smuzhiyun/ { 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun sound { 9*4882a593Smuzhiyun status = "disabled"; 10*4882a593Smuzhiyun }; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun sound-mqs { 13*4882a593Smuzhiyun compatible = "fsl,imx6sx-sdb-mqs", 14*4882a593Smuzhiyun "fsl,imx-audio-mqs"; 15*4882a593Smuzhiyun model = "mqs-audio"; 16*4882a593Smuzhiyun audio-cpu = <&sai1>; 17*4882a593Smuzhiyun audio-asrc = <&asrc>; 18*4882a593Smuzhiyun audio-codec = <&mqs>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun}; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun&usdhc2 { 23*4882a593Smuzhiyun /* pin conflict with mqs*/ 24*4882a593Smuzhiyun status = "disabled"; 25*4882a593Smuzhiyun}; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun&mqs { 28*4882a593Smuzhiyun pinctrl-names = "default"; 29*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mqs>; 30*4882a593Smuzhiyun clocks = <&clks IMX6SX_CLK_SAI1>; 31*4882a593Smuzhiyun clock-names = "mclk"; 32*4882a593Smuzhiyun status = "okay"; 33*4882a593Smuzhiyun}; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun&sai1 { 36*4882a593Smuzhiyun pinctrl-0 = <>; 37*4882a593Smuzhiyun status = "okay"; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&ssi2 { 41*4882a593Smuzhiyun status = "disabled"; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun&sdma { 45*4882a593Smuzhiyun gpr = <&gpr>; 46*4882a593Smuzhiyun /* SDMA event remap for SAI1 */ 47*4882a593Smuzhiyun fsl,sdma-event-remap = <0 15 1>, <0 16 1>; 48*4882a593Smuzhiyun}; 49