xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx6sll-evk.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2016 Freescale Semiconductor, Inc.
4*4882a593Smuzhiyun * Copyright 2017-2018 NXP.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
11*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
12*4882a593Smuzhiyun#include "imx6sll.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "Freescale i.MX6SLL EVK Board";
16*4882a593Smuzhiyun	compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	chosen {
19*4882a593Smuzhiyun		stdout-path = &uart1;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	memory@80000000 {
23*4882a593Smuzhiyun		device_type = "memory";
24*4882a593Smuzhiyun		reg = <0x80000000 0x80000000>;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	backlight_display: backlight-display {
28*4882a593Smuzhiyun		compatible = "pwm-backlight";
29*4882a593Smuzhiyun		pwms = <&pwm1 0 5000000>;
30*4882a593Smuzhiyun		brightness-levels = <0 4 8 16 32 64 128 255>;
31*4882a593Smuzhiyun		default-brightness-level = <6>;
32*4882a593Smuzhiyun		status = "okay";
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	leds {
36*4882a593Smuzhiyun		compatible = "gpio-leds";
37*4882a593Smuzhiyun		pinctrl-names = "default";
38*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_led>;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		user {
41*4882a593Smuzhiyun			label = "debug";
42*4882a593Smuzhiyun			gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
43*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	reg_usb_otg1_vbus: regulator-otg1-vbus {
48*4882a593Smuzhiyun		compatible = "regulator-fixed";
49*4882a593Smuzhiyun		pinctrl-names = "default";
50*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
51*4882a593Smuzhiyun		regulator-name = "usb_otg1_vbus";
52*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
53*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
54*4882a593Smuzhiyun		gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
55*4882a593Smuzhiyun		enable-active-high;
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	reg_usb_otg2_vbus: regulator-otg2-vbus {
59*4882a593Smuzhiyun		compatible = "regulator-fixed";
60*4882a593Smuzhiyun		pinctrl-names = "default";
61*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
62*4882a593Smuzhiyun		regulator-name = "usb_otg2_vbus";
63*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
64*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
65*4882a593Smuzhiyun		gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
66*4882a593Smuzhiyun		enable-active-high;
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	reg_aud3v: regulator-aud3v {
70*4882a593Smuzhiyun		compatible = "regulator-fixed";
71*4882a593Smuzhiyun		regulator-name = "wm8962-supply-3v15";
72*4882a593Smuzhiyun		regulator-min-microvolt = <3150000>;
73*4882a593Smuzhiyun		regulator-max-microvolt = <3150000>;
74*4882a593Smuzhiyun		regulator-boot-on;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	reg_aud4v: regulator-aud4v {
78*4882a593Smuzhiyun		compatible = "regulator-fixed";
79*4882a593Smuzhiyun		regulator-name = "wm8962-supply-4v2";
80*4882a593Smuzhiyun		regulator-min-microvolt = <4325000>;
81*4882a593Smuzhiyun		regulator-max-microvolt = <4325000>;
82*4882a593Smuzhiyun		regulator-boot-on;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	reg_lcd_3v3: regulator-lcd-3v3 {
86*4882a593Smuzhiyun		compatible = "regulator-fixed";
87*4882a593Smuzhiyun		pinctrl-names = "default";
88*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
89*4882a593Smuzhiyun		regulator-name = "lcd-3v3";
90*4882a593Smuzhiyun		gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
91*4882a593Smuzhiyun		enable-active-high;
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	reg_lcd_5v: regulator-lcd-5v {
95*4882a593Smuzhiyun		compatible = "regulator-fixed";
96*4882a593Smuzhiyun		regulator-name = "lcd-5v0";
97*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
98*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun	reg_sd1_vmmc: regulator-sd1-vmmc {
102*4882a593Smuzhiyun		compatible = "regulator-fixed";
103*4882a593Smuzhiyun		pinctrl-names = "default";
104*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_reg_sd1_vmmc>;
105*4882a593Smuzhiyun		regulator-name = "SD1_SPWR";
106*4882a593Smuzhiyun		regulator-min-microvolt = <3000000>;
107*4882a593Smuzhiyun		regulator-max-microvolt = <3000000>;
108*4882a593Smuzhiyun		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
109*4882a593Smuzhiyun		enable-active-high;
110*4882a593Smuzhiyun	};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun	reg_sd3_vmmc: regulator-sd3-vmmc {
113*4882a593Smuzhiyun		compatible = "regulator-fixed";
114*4882a593Smuzhiyun		pinctrl-names = "default";
115*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_reg_sd3_vmmc>;
116*4882a593Smuzhiyun		regulator-name = "SD3_WIFI";
117*4882a593Smuzhiyun		regulator-min-microvolt = <3000000>;
118*4882a593Smuzhiyun		regulator-max-microvolt = <3000000>;
119*4882a593Smuzhiyun		gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>;
120*4882a593Smuzhiyun		enable-active-high;
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun	panel {
124*4882a593Smuzhiyun		compatible = "sii,43wvf1g";
125*4882a593Smuzhiyun		backlight = <&backlight_display>;
126*4882a593Smuzhiyun		dvdd-supply = <&reg_lcd_3v3>;
127*4882a593Smuzhiyun		avdd-supply = <&reg_lcd_5v>;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		port {
130*4882a593Smuzhiyun			panel_in: endpoint {
131*4882a593Smuzhiyun				remote-endpoint = <&display_out>;
132*4882a593Smuzhiyun			};
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	sound {
137*4882a593Smuzhiyun		compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
138*4882a593Smuzhiyun		pinctrl-names = "default";
139*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_hp>;
140*4882a593Smuzhiyun		model = "wm8962-audio";
141*4882a593Smuzhiyun		audio-cpu = <&ssi2>;
142*4882a593Smuzhiyun		audio-codec = <&wm8962>;
143*4882a593Smuzhiyun		audio-routing =
144*4882a593Smuzhiyun			"Headphone Jack", "HPOUTL",
145*4882a593Smuzhiyun			"Headphone Jack", "HPOUTR",
146*4882a593Smuzhiyun			"Ext Spk", "SPKOUTL",
147*4882a593Smuzhiyun			"Ext Spk", "SPKOUTR",
148*4882a593Smuzhiyun			"AMIC", "MICBIAS",
149*4882a593Smuzhiyun			"IN3R", "AMIC";
150*4882a593Smuzhiyun		mux-int-port = <2>;
151*4882a593Smuzhiyun		mux-ext-port = <3>;
152*4882a593Smuzhiyun		hp-det-gpio = <&gpio4 24 GPIO_ACTIVE_LOW>;
153*4882a593Smuzhiyun	};
154*4882a593Smuzhiyun};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun&audmux {
157*4882a593Smuzhiyun	pinctrl-names = "default";
158*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_audmux3>;
159*4882a593Smuzhiyun	status = "okay";
160*4882a593Smuzhiyun};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun&cpu0 {
163*4882a593Smuzhiyun	arm-supply = <&sw1a_reg>;
164*4882a593Smuzhiyun	soc-supply = <&sw1c_reg>;
165*4882a593Smuzhiyun};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun&i2c1 {
168*4882a593Smuzhiyun	clock-frequency = <100000>;
169*4882a593Smuzhiyun	pinctrl-names = "default";
170*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_i2c1>;
171*4882a593Smuzhiyun	status = "okay";
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun	pfuze100: pmic@8 {
174*4882a593Smuzhiyun		compatible = "fsl,pfuze100";
175*4882a593Smuzhiyun		reg = <0x08>;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun		regulators {
178*4882a593Smuzhiyun			sw1a_reg: sw1ab {
179*4882a593Smuzhiyun				regulator-min-microvolt = <300000>;
180*4882a593Smuzhiyun				regulator-max-microvolt = <1875000>;
181*4882a593Smuzhiyun				regulator-boot-on;
182*4882a593Smuzhiyun				regulator-always-on;
183*4882a593Smuzhiyun				regulator-ramp-delay = <6250>;
184*4882a593Smuzhiyun			};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun			sw1c_reg: sw1c {
187*4882a593Smuzhiyun				regulator-min-microvolt = <300000>;
188*4882a593Smuzhiyun				regulator-max-microvolt = <1875000>;
189*4882a593Smuzhiyun				regulator-boot-on;
190*4882a593Smuzhiyun				regulator-always-on;
191*4882a593Smuzhiyun				regulator-ramp-delay = <6250>;
192*4882a593Smuzhiyun			};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun			sw2_reg: sw2 {
195*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
196*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
197*4882a593Smuzhiyun				regulator-boot-on;
198*4882a593Smuzhiyun				regulator-always-on;
199*4882a593Smuzhiyun			};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun			sw3a_reg: sw3a {
202*4882a593Smuzhiyun				regulator-min-microvolt = <400000>;
203*4882a593Smuzhiyun				regulator-max-microvolt = <1975000>;
204*4882a593Smuzhiyun				regulator-boot-on;
205*4882a593Smuzhiyun				regulator-always-on;
206*4882a593Smuzhiyun			};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun			sw3b_reg: sw3b {
209*4882a593Smuzhiyun				regulator-min-microvolt = <400000>;
210*4882a593Smuzhiyun				regulator-max-microvolt = <1975000>;
211*4882a593Smuzhiyun				regulator-boot-on;
212*4882a593Smuzhiyun				regulator-always-on;
213*4882a593Smuzhiyun			};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun			sw4_reg: sw4 {
216*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
217*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
218*4882a593Smuzhiyun				regulator-always-on;
219*4882a593Smuzhiyun			};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun			swbst_reg: swbst {
222*4882a593Smuzhiyun				regulator-min-microvolt = <5000000>;
223*4882a593Smuzhiyun				regulator-max-microvolt = <5150000>;
224*4882a593Smuzhiyun			};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun			snvs_reg: vsnvs {
227*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
228*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
229*4882a593Smuzhiyun				regulator-boot-on;
230*4882a593Smuzhiyun				regulator-always-on;
231*4882a593Smuzhiyun			};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun			vref_reg: vrefddr {
234*4882a593Smuzhiyun				regulator-boot-on;
235*4882a593Smuzhiyun				regulator-always-on;
236*4882a593Smuzhiyun			};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun			vgen1_reg: vgen1 {
239*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
240*4882a593Smuzhiyun				regulator-max-microvolt = <1550000>;
241*4882a593Smuzhiyun				regulator-always-on;
242*4882a593Smuzhiyun			};
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun			vgen2_reg: vgen2 {
245*4882a593Smuzhiyun				regulator-min-microvolt = <800000>;
246*4882a593Smuzhiyun				regulator-max-microvolt = <1550000>;
247*4882a593Smuzhiyun			};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun			vgen3_reg: vgen3 {
250*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
251*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
252*4882a593Smuzhiyun			};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun			vgen4_reg: vgen4 {
255*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
256*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
257*4882a593Smuzhiyun				regulator-always-on;
258*4882a593Smuzhiyun			};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun			vgen5_reg: vgen5 {
261*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
262*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
263*4882a593Smuzhiyun				regulator-always-on;
264*4882a593Smuzhiyun			};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun			vgen6_reg: vgen6 {
267*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
268*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
269*4882a593Smuzhiyun				regulator-always-on;
270*4882a593Smuzhiyun			};
271*4882a593Smuzhiyun		};
272*4882a593Smuzhiyun	};
273*4882a593Smuzhiyun};
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun&i2c3 {
276*4882a593Smuzhiyun	clock-frequency = <100000>;
277*4882a593Smuzhiyun	pinctrl-names = "default";
278*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_i2c3>;
279*4882a593Smuzhiyun	status = "okay";
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun	wm8962: audio-codec@1a {
282*4882a593Smuzhiyun		compatible = "wlf,wm8962";
283*4882a593Smuzhiyun		reg = <0x1a>;
284*4882a593Smuzhiyun		clocks = <&clks IMX6SLL_CLK_EXTERN_AUDIO>;
285*4882a593Smuzhiyun		DCVDD-supply = <&vgen3_reg>;
286*4882a593Smuzhiyun		DBVDD-supply = <&reg_aud3v>;
287*4882a593Smuzhiyun		AVDD-supply = <&vgen3_reg>;
288*4882a593Smuzhiyun		CPVDD-supply = <&vgen3_reg>;
289*4882a593Smuzhiyun		MICVDD-supply = <&reg_aud3v>;
290*4882a593Smuzhiyun		PLLVDD-supply = <&vgen3_reg>;
291*4882a593Smuzhiyun		SPKVDD1-supply = <&reg_aud4v>;
292*4882a593Smuzhiyun		SPKVDD2-supply = <&reg_aud4v>;
293*4882a593Smuzhiyun	};
294*4882a593Smuzhiyun};
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun&lcdif {
297*4882a593Smuzhiyun	pinctrl-names = "default";
298*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_lcd>;
299*4882a593Smuzhiyun	status = "okay";
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun	port {
302*4882a593Smuzhiyun		display_out: endpoint {
303*4882a593Smuzhiyun			remote-endpoint = <&panel_in>;
304*4882a593Smuzhiyun		};
305*4882a593Smuzhiyun	};
306*4882a593Smuzhiyun};
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun&pwm1 {
309*4882a593Smuzhiyun	#pwm-cells = <2>;
310*4882a593Smuzhiyun	pinctrl-names = "default";
311*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_pwm1>;
312*4882a593Smuzhiyun	status = "okay";
313*4882a593Smuzhiyun};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun&snvs_poweroff {
316*4882a593Smuzhiyun	status = "okay";
317*4882a593Smuzhiyun};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun&snvs_pwrkey {
320*4882a593Smuzhiyun	status = "okay";
321*4882a593Smuzhiyun};
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun&ssi2 {
324*4882a593Smuzhiyun	status = "okay";
325*4882a593Smuzhiyun};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun&uart1 {
328*4882a593Smuzhiyun	pinctrl-names = "default";
329*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_uart1>;
330*4882a593Smuzhiyun	status = "okay";
331*4882a593Smuzhiyun};
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun&usdhc1 {
334*4882a593Smuzhiyun	pinctrl-names = "default", "state_100mhz", "state_200mhz";
335*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usdhc1>;
336*4882a593Smuzhiyun	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
337*4882a593Smuzhiyun	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
338*4882a593Smuzhiyun	cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
339*4882a593Smuzhiyun	wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
340*4882a593Smuzhiyun	keep-power-in-suspend;
341*4882a593Smuzhiyun	wakeup-source;
342*4882a593Smuzhiyun	vmmc-supply = <&reg_sd1_vmmc>;
343*4882a593Smuzhiyun	status = "okay";
344*4882a593Smuzhiyun};
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun&usbotg1 {
347*4882a593Smuzhiyun	vbus-supply = <&reg_usb_otg1_vbus>;
348*4882a593Smuzhiyun	pinctrl-names = "default";
349*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usbotg1>;
350*4882a593Smuzhiyun	disable-over-current;
351*4882a593Smuzhiyun	srp-disable;
352*4882a593Smuzhiyun	hnp-disable;
353*4882a593Smuzhiyun	adp-disable;
354*4882a593Smuzhiyun	status = "okay";
355*4882a593Smuzhiyun};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun&usbotg2 {
358*4882a593Smuzhiyun	vbus-supply = <&reg_usb_otg2_vbus>;
359*4882a593Smuzhiyun	dr_mode = "host";
360*4882a593Smuzhiyun	disable-over-current;
361*4882a593Smuzhiyun	status = "okay";
362*4882a593Smuzhiyun};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun&usdhc3 {
365*4882a593Smuzhiyun	pinctrl-names = "default", "state_100mhz", "state_200mhz";
366*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usdhc3>;
367*4882a593Smuzhiyun	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
368*4882a593Smuzhiyun	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
369*4882a593Smuzhiyun	cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
370*4882a593Smuzhiyun	keep-power-in-suspend;
371*4882a593Smuzhiyun	wakeup-source;
372*4882a593Smuzhiyun	vmmc-supply = <&reg_sd3_vmmc>;
373*4882a593Smuzhiyun	status = "okay";
374*4882a593Smuzhiyun};
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun&wdog1 {
377*4882a593Smuzhiyun	pinctrl-names = "default";
378*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_wdog1>;
379*4882a593Smuzhiyun	fsl,ext-reset-output;
380*4882a593Smuzhiyun};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun&iomuxc {
383*4882a593Smuzhiyun	pinctrl_audmux3: audmux3grp {
384*4882a593Smuzhiyun		fsl,pins = <
385*4882a593Smuzhiyun			MX6SLL_PAD_AUD_TXC__AUD3_TXC		0x4130b0
386*4882a593Smuzhiyun			MX6SLL_PAD_AUD_TXFS__AUD3_TXFS		0x4130b0
387*4882a593Smuzhiyun			MX6SLL_PAD_AUD_TXD__AUD3_TXD		0x4110b0
388*4882a593Smuzhiyun			MX6SLL_PAD_AUD_RXD__AUD3_RXD		0x4130b0
389*4882a593Smuzhiyun			MX6SLL_PAD_AUD_MCLK__AUDIO_CLK_OUT	0x4130b0
390*4882a593Smuzhiyun		>;
391*4882a593Smuzhiyun	};
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun	pinctrl_hp: hpgrp {
394*4882a593Smuzhiyun		fsl,pins = <
395*4882a593Smuzhiyun			MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24 0x17059 /* HP DETECT */
396*4882a593Smuzhiyun		>;
397*4882a593Smuzhiyun	};
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun	pinctrl_reg_sd3_vmmc: sd3vmmcgrp {
400*4882a593Smuzhiyun		fsl,pins = <
401*4882a593Smuzhiyun			MX6SLL_PAD_KEY_COL6__GPIO4_IO04 0x17059
402*4882a593Smuzhiyun		>;
403*4882a593Smuzhiyun	};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun	pinctrl_usb_otg1_vbus: vbus1grp {
406*4882a593Smuzhiyun		fsl,pins = <
407*4882a593Smuzhiyun			MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
408*4882a593Smuzhiyun		>;
409*4882a593Smuzhiyun	};
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun	pinctrl_usb_otg2_vbus: vbus2grp {
412*4882a593Smuzhiyun		fsl,pins = <
413*4882a593Smuzhiyun			MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
414*4882a593Smuzhiyun		>;
415*4882a593Smuzhiyun	};
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun	pinctrl_reg_lcd_3v3: reglcd3v3grp {
418*4882a593Smuzhiyun		fsl,pins = <
419*4882a593Smuzhiyun			MX6SLL_PAD_KEY_ROW5__GPIO4_IO03 0x17059
420*4882a593Smuzhiyun		>;
421*4882a593Smuzhiyun	};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun	pinctrl_reg_sd1_vmmc: sd1vmmcgrp {
424*4882a593Smuzhiyun		fsl,pins = <
425*4882a593Smuzhiyun			MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
426*4882a593Smuzhiyun		>;
427*4882a593Smuzhiyun	};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun	pinctrl_uart1: uart1grp {
430*4882a593Smuzhiyun		fsl,pins = <
431*4882a593Smuzhiyun			MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
432*4882a593Smuzhiyun			MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
433*4882a593Smuzhiyun		>;
434*4882a593Smuzhiyun	};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun	pinctrl_usdhc1: usdhc1grp {
437*4882a593Smuzhiyun		fsl,pins = <
438*4882a593Smuzhiyun			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x17059
439*4882a593Smuzhiyun			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x13059
440*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x17059
441*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x17059
442*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x17059
443*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x17059
444*4882a593Smuzhiyun		>;
445*4882a593Smuzhiyun	};
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
448*4882a593Smuzhiyun		fsl,pins = <
449*4882a593Smuzhiyun			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170b9
450*4882a593Smuzhiyun			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130b9
451*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170b9
452*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170b9
453*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170b9
454*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170b9
455*4882a593Smuzhiyun		>;
456*4882a593Smuzhiyun	};
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
459*4882a593Smuzhiyun		fsl,pins = <
460*4882a593Smuzhiyun			MX6SLL_PAD_SD1_CMD__SD1_CMD	0x170f9
461*4882a593Smuzhiyun			MX6SLL_PAD_SD1_CLK__SD1_CLK	0x130f9
462*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA0__SD1_DATA0	0x170f9
463*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA1__SD1_DATA1	0x170f9
464*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA2__SD1_DATA2	0x170f9
465*4882a593Smuzhiyun			MX6SLL_PAD_SD1_DATA3__SD1_DATA3	0x170f9
466*4882a593Smuzhiyun		>;
467*4882a593Smuzhiyun	};
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun	pinctrl_usbotg1: usbotg1grp {
470*4882a593Smuzhiyun		fsl,pins = <
471*4882a593Smuzhiyun			MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
472*4882a593Smuzhiyun		>;
473*4882a593Smuzhiyun	};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun	pinctrl_usdhc3: usdhc3grp {
476*4882a593Smuzhiyun		fsl,pins = <
477*4882a593Smuzhiyun			MX6SLL_PAD_SD3_CMD__SD3_CMD		0x17061
478*4882a593Smuzhiyun			MX6SLL_PAD_SD3_CLK__SD3_CLK		0x13061
479*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA0__SD3_DATA0		0x17061
480*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA1__SD3_DATA1		0x17061
481*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA2__SD3_DATA2		0x17061
482*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA3__SD3_DATA3		0x17061
483*4882a593Smuzhiyun			MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22	0x17059
484*4882a593Smuzhiyun		>;
485*4882a593Smuzhiyun	};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
488*4882a593Smuzhiyun		fsl,pins = <
489*4882a593Smuzhiyun			MX6SLL_PAD_SD3_CMD__SD3_CMD		0x170a1
490*4882a593Smuzhiyun			MX6SLL_PAD_SD3_CLK__SD3_CLK		0x130a1
491*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA0__SD3_DATA0		0x170a1
492*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA1__SD3_DATA1		0x170a1
493*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA2__SD3_DATA2		0x170a1
494*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA3__SD3_DATA3		0x170a1
495*4882a593Smuzhiyun			MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22	0x17059
496*4882a593Smuzhiyun		>;
497*4882a593Smuzhiyun	};
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
500*4882a593Smuzhiyun		fsl,pins = <
501*4882a593Smuzhiyun			MX6SLL_PAD_SD3_CMD__SD3_CMD		0x170e9
502*4882a593Smuzhiyun			MX6SLL_PAD_SD3_CLK__SD3_CLK		0x130f9
503*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA0__SD3_DATA0		0x170e9
504*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA1__SD3_DATA1		0x170e9
505*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA2__SD3_DATA2		0x170e9
506*4882a593Smuzhiyun			MX6SLL_PAD_SD3_DATA3__SD3_DATA3		0x170e9
507*4882a593Smuzhiyun			MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22	0x17059
508*4882a593Smuzhiyun		>;
509*4882a593Smuzhiyun	};
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun	pinctrl_i2c1: i2c1grp {
512*4882a593Smuzhiyun		fsl,pins = <
513*4882a593Smuzhiyun			MX6SLL_PAD_I2C1_SCL__I2C1_SCL	 0x4001b8b1
514*4882a593Smuzhiyun			MX6SLL_PAD_I2C1_SDA__I2C1_SDA	 0x4001b8b1
515*4882a593Smuzhiyun		>;
516*4882a593Smuzhiyun	};
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun	pinctrl_i2c3: i2c3grp {
519*4882a593Smuzhiyun		fsl,pins = <
520*4882a593Smuzhiyun			MX6SLL_PAD_AUD_RXFS__I2C3_SCL  0x4041b8b1
521*4882a593Smuzhiyun			MX6SLL_PAD_AUD_RXC__I2C3_SDA   0x4041b8b1
522*4882a593Smuzhiyun		>;
523*4882a593Smuzhiyun	};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun	pinctrl_lcd: lcdgrp {
526*4882a593Smuzhiyun		fsl,pins = <
527*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA00__LCD_DATA00	0x79
528*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA01__LCD_DATA01	0x79
529*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA02__LCD_DATA02	0x79
530*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA03__LCD_DATA03	0x79
531*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA04__LCD_DATA04	0x79
532*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA05__LCD_DATA05	0x79
533*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA06__LCD_DATA06	0x79
534*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA07__LCD_DATA07	0x79
535*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA08__LCD_DATA08	0x79
536*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA09__LCD_DATA09	0x79
537*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA10__LCD_DATA10	0x79
538*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA11__LCD_DATA11	0x79
539*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA12__LCD_DATA12	0x79
540*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA13__LCD_DATA13	0x79
541*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA14__LCD_DATA14	0x79
542*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA15__LCD_DATA15	0x79
543*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA16__LCD_DATA16	0x79
544*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA17__LCD_DATA17	0x79
545*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA18__LCD_DATA18	0x79
546*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA19__LCD_DATA19	0x79
547*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA20__LCD_DATA20	0x79
548*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA21__LCD_DATA21	0x79
549*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA22__LCD_DATA22	0x79
550*4882a593Smuzhiyun			MX6SLL_PAD_LCD_DATA23__LCD_DATA23	0x79
551*4882a593Smuzhiyun			MX6SLL_PAD_LCD_CLK__LCD_CLK		0x79
552*4882a593Smuzhiyun			MX6SLL_PAD_LCD_ENABLE__LCD_ENABLE	0x79
553*4882a593Smuzhiyun			MX6SLL_PAD_LCD_HSYNC__LCD_HSYNC		0x79
554*4882a593Smuzhiyun			MX6SLL_PAD_LCD_VSYNC__LCD_VSYNC		0x79
555*4882a593Smuzhiyun			MX6SLL_PAD_LCD_RESET__LCD_RESET		0x79
556*4882a593Smuzhiyun		>;
557*4882a593Smuzhiyun	};
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun	pinctrl_led: ledgrp {
560*4882a593Smuzhiyun		fsl,pins = <
561*4882a593Smuzhiyun			MX6SLL_PAD_EPDC_VCOM1__GPIO2_IO04	0x17059
562*4882a593Smuzhiyun		>;
563*4882a593Smuzhiyun	};
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun	pinctrl_pwm1: pmw1grp {
566*4882a593Smuzhiyun		fsl,pins = <
567*4882a593Smuzhiyun			MX6SLL_PAD_PWM1__PWM1_OUT   0x110b0
568*4882a593Smuzhiyun		>;
569*4882a593Smuzhiyun	};
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun	pinctrl_wdog1: wdog1grp	{
572*4882a593Smuzhiyun		fsl,pins = <
573*4882a593Smuzhiyun			MX6SLL_PAD_WDOG_B__WDOG1_B   0x170b0
574*4882a593Smuzhiyun		>;
575*4882a593Smuzhiyun	};
576*4882a593Smuzhiyun};
577