1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Copyright 2016 Freescale Semiconductor, Inc. 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "imx6qp.dtsi" 8*4882a593Smuzhiyun#include "imx6qdl-sabresd.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board"; 12*4882a593Smuzhiyun compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp"; 13*4882a593Smuzhiyun}; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun®_arm { 16*4882a593Smuzhiyun vin-supply = <&sw2_reg>; 17*4882a593Smuzhiyun}; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun&iomuxc { 20*4882a593Smuzhiyun imx6qdl-sabresd { 21*4882a593Smuzhiyun pinctrl_usdhc2: usdhc2grp { 22*4882a593Smuzhiyun fsl,pins = < 23*4882a593Smuzhiyun MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 24*4882a593Smuzhiyun MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 25*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 26*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 27*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 28*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 29*4882a593Smuzhiyun MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 30*4882a593Smuzhiyun MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 31*4882a593Smuzhiyun MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 32*4882a593Smuzhiyun MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 33*4882a593Smuzhiyun >; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun pinctrl_usdhc3: usdhc3grp { 37*4882a593Smuzhiyun fsl,pins = < 38*4882a593Smuzhiyun MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 39*4882a593Smuzhiyun MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071 40*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 41*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 42*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 43*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 44*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 45*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 46*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 47*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 48*4882a593Smuzhiyun >; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&pcie { 54*4882a593Smuzhiyun status = "disabled"; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&sata { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun}; 60