1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Copyright 2013 Freescale Semiconductor, Inc. 4*4882a593Smuzhiyun// 5*4882a593Smuzhiyun// Author: Fabio Estevam <fabio.estevam@freescale.com> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "imx6qdl-wandboard.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun&iomuxc { 10*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hog>; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun imx6qdl-wandboard { 13*4882a593Smuzhiyun pinctrl_hog: hoggrp { 14*4882a593Smuzhiyun fsl,pins = < 15*4882a593Smuzhiyun MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* uSDHC1 CD */ 16*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */ 17*4882a593Smuzhiyun MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x0f0b0 /* WL_REF_ON */ 18*4882a593Smuzhiyun MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x0f0b0 /* WL_RST_N */ 19*4882a593Smuzhiyun MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x000b0 /* WL_REG_ON */ 20*4882a593Smuzhiyun MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */ 21*4882a593Smuzhiyun MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */ 22*4882a593Smuzhiyun MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 /* RGMII_nRST */ 23*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000 /* BT_ON */ 24*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x80000000 /* BT_WAKE */ 25*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x80000000 /* BT_HOST_WAKE */ 26*4882a593Smuzhiyun >; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun}; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun&usdhc2 { 32*4882a593Smuzhiyun pinctrl-names = "default"; 33*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc2>; 34*4882a593Smuzhiyun non-removable; 35*4882a593Smuzhiyun status = "okay"; 36*4882a593Smuzhiyun}; 37