1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2014 Protonic Holland 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 7*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun chosen { 11*4882a593Smuzhiyun stdout-path = &uart4; 12*4882a593Smuzhiyun }; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun reg_3v3: regulator-3v3 { 15*4882a593Smuzhiyun compatible = "regulator-fixed"; 16*4882a593Smuzhiyun regulator-name = "3v3"; 17*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 18*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun reg_usb_h1_vbus: regulator-h1-vbus { 22*4882a593Smuzhiyun compatible = "regulator-fixed"; 23*4882a593Smuzhiyun regulator-name = "h1-vbus"; 24*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 25*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun reg_usb_otg_vbus: regulator-otg-vbus { 29*4882a593Smuzhiyun compatible = "regulator-fixed"; 30*4882a593Smuzhiyun regulator-name = "otg-vbus"; 31*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 32*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 33*4882a593Smuzhiyun gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 34*4882a593Smuzhiyun enable-active-high; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun&can1 { 39*4882a593Smuzhiyun pinctrl-names = "default"; 40*4882a593Smuzhiyun status = "okay"; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&i2c1 { 44*4882a593Smuzhiyun clock-frequency = <100000>; 45*4882a593Smuzhiyun pinctrl-names = "default"; 46*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c1>; 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&i2c3 { 51*4882a593Smuzhiyun clock-frequency = <100000>; 52*4882a593Smuzhiyun pinctrl-names = "default"; 53*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c3>; 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun temperature-sensor@70 { 57*4882a593Smuzhiyun compatible = "ti,tmp103"; 58*4882a593Smuzhiyun reg = <0x70>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&uart4 { 63*4882a593Smuzhiyun pinctrl-names = "default"; 64*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart4>; 65*4882a593Smuzhiyun status = "okay"; 66*4882a593Smuzhiyun}; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun&usbh1 { 69*4882a593Smuzhiyun vbus-supply = <®_usb_h1_vbus>; 70*4882a593Smuzhiyun phy_type = "utmi"; 71*4882a593Smuzhiyun dr_mode = "host"; 72*4882a593Smuzhiyun status = "okay"; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&usbotg { 76*4882a593Smuzhiyun vbus-supply = <®_usb_otg_vbus>; 77*4882a593Smuzhiyun pinctrl-names = "default"; 78*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbotg>; 79*4882a593Smuzhiyun phy_type = "utmi"; 80*4882a593Smuzhiyun dr_mode = "host"; 81*4882a593Smuzhiyun disable-over-current; 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun}; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun&usdhc1 { 86*4882a593Smuzhiyun pinctrl-names = "default"; 87*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc1>; 88*4882a593Smuzhiyun cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun}; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun&usdhc3 { 93*4882a593Smuzhiyun pinctrl-names = "default"; 94*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc3>; 95*4882a593Smuzhiyun bus-width = <8>; 96*4882a593Smuzhiyun non-removable; 97*4882a593Smuzhiyun status = "okay"; 98*4882a593Smuzhiyun}; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun&iomuxc { 101*4882a593Smuzhiyun pinctrl_can1: can1grp { 102*4882a593Smuzhiyun fsl,pins = < 103*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b008 104*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b008 105*4882a593Smuzhiyun >; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun pinctrl_i2c1: i2c1grp { 109*4882a593Smuzhiyun fsl,pins = < 110*4882a593Smuzhiyun MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1 111*4882a593Smuzhiyun MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1 112*4882a593Smuzhiyun >; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun pinctrl_i2c3: i2c3grp { 116*4882a593Smuzhiyun fsl,pins = < 117*4882a593Smuzhiyun MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 118*4882a593Smuzhiyun MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 119*4882a593Smuzhiyun >; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun pinctrl_uart4: uart4grp { 123*4882a593Smuzhiyun fsl,pins = < 124*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 125*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 126*4882a593Smuzhiyun >; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun pinctrl_usdhc1: usdhc1grp { 130*4882a593Smuzhiyun fsl,pins = < 131*4882a593Smuzhiyun MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9 132*4882a593Smuzhiyun MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9 133*4882a593Smuzhiyun MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 134*4882a593Smuzhiyun MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 135*4882a593Smuzhiyun MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 136*4882a593Smuzhiyun MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 137*4882a593Smuzhiyun MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0 138*4882a593Smuzhiyun >; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun pinctrl_usdhc3: usdhc3grp { 142*4882a593Smuzhiyun fsl,pins = < 143*4882a593Smuzhiyun MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099 144*4882a593Smuzhiyun MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099 145*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099 146*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099 147*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099 148*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099 149*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099 150*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099 151*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099 152*4882a593Smuzhiyun MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099 153*4882a593Smuzhiyun MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1 154*4882a593Smuzhiyun >; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun pinctrl_usbotg: usbotggrp { 158*4882a593Smuzhiyun fsl,pins = < 159*4882a593Smuzhiyun MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 160*4882a593Smuzhiyun MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 161*4882a593Smuzhiyun >; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun}; 164