xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx6qdl-emcon-avari.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 or MIT)
2*4882a593Smuzhiyun//
3*4882a593Smuzhiyun// Copyright (C) 2018 emtrion GmbH
4*4882a593Smuzhiyun//
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/ {
7*4882a593Smuzhiyun	aliases {
8*4882a593Smuzhiyun		boardid = &boardid;
9*4882a593Smuzhiyun		mmc0 = &usdhc3;
10*4882a593Smuzhiyun		mmc1 = &usdhc2;
11*4882a593Smuzhiyun		mmc2 = &usdhc1;
12*4882a593Smuzhiyun		mmc3 = &usdhc4;
13*4882a593Smuzhiyun	};
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	reg_wall_5p0: reg-wall5p0 {
16*4882a593Smuzhiyun		compatible = "regulator-fixed";
17*4882a593Smuzhiyun		regulator-name = "Main-Supply";
18*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
19*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
20*4882a593Smuzhiyun		regulator-always-on;
21*4882a593Smuzhiyun		regulator-boot-on;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	reg_base3p3: reg-base3p3 {
25*4882a593Smuzhiyun		compatible = "regulator-fixed";
26*4882a593Smuzhiyun		vin-supply = <&reg_wall_5p0>;
27*4882a593Smuzhiyun		regulator-name = "3V3-avari";
28*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
29*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
30*4882a593Smuzhiyun		regulator-always-on;
31*4882a593Smuzhiyun		regulator-boot-on;
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	reg_base1p5: reg-base1p5 {
35*4882a593Smuzhiyun		compatible = "regulator-fixed";
36*4882a593Smuzhiyun		vin-supply = <&reg_base3p3>;
37*4882a593Smuzhiyun		regulator-name = "1V5-avari";
38*4882a593Smuzhiyun		regulator-min-microvolt = <1500000>;
39*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
40*4882a593Smuzhiyun		regulator-always-on;
41*4882a593Smuzhiyun		regulator-boot-on;
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun	reg_usb_otg: reg-otgvbus {
45*4882a593Smuzhiyun		compatible = "regulator-fixed";
46*4882a593Smuzhiyun		vin-supply = <&reg_wall_5p0>;
47*4882a593Smuzhiyun		regulator-name = "OTG_VBUS";
48*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
49*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
50*4882a593Smuzhiyun		gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
51*4882a593Smuzhiyun		regulator-always-on;
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	clk_codec: clock-codec {
55*4882a593Smuzhiyun		compatible = "fixed-clock";
56*4882a593Smuzhiyun		#clock-cells = <0>;
57*4882a593Smuzhiyun		clock-frequency  = <12000000>;
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	sound {
61*4882a593Smuzhiyun		compatible = "fsl,imx-audio-sgtl5000";
62*4882a593Smuzhiyun		model = "emCON-avari-sgtl5000";
63*4882a593Smuzhiyun		ssi-controller = <&ssi2>;
64*4882a593Smuzhiyun		audio-codec = <&sgtl5000>;
65*4882a593Smuzhiyun		audio-routing =
66*4882a593Smuzhiyun			"Headphone Jack", "HP_OUT";
67*4882a593Smuzhiyun		mux-int-port = <2>;
68*4882a593Smuzhiyun		mux-ext-port = <3>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun&audmux {
73*4882a593Smuzhiyun	pinctrl-names = "default";
74*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_audmux>;
75*4882a593Smuzhiyun	status = "okay";
76*4882a593Smuzhiyun};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun&can1 {
79*4882a593Smuzhiyun	status = "okay";
80*4882a593Smuzhiyun};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun&can2 {
83*4882a593Smuzhiyun	status = "okay";
84*4882a593Smuzhiyun};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun&ecspi2 {
87*4882a593Smuzhiyun	status = "okay";
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&hdmi {
91*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c2>;
92*4882a593Smuzhiyun	status = "okay";
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&i2c2 {
96*4882a593Smuzhiyun	status = "okay";
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun&i2c3 {
100*4882a593Smuzhiyun	clock-frequency = <100000>;
101*4882a593Smuzhiyun	pinctrl-names = "default";
102*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_i2c3>;
103*4882a593Smuzhiyun	status = "okay";
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	sgtl5000: audio-codec@a {
106*4882a593Smuzhiyun		compatible = "fsl,sgtl5000";
107*4882a593Smuzhiyun		reg = <0x0a>;
108*4882a593Smuzhiyun		#sound-dai-cells = <0>;
109*4882a593Smuzhiyun		clocks = <&clk_codec>;
110*4882a593Smuzhiyun		VDDA-supply = <&reg_base3p3>;
111*4882a593Smuzhiyun		VDDIO-supply = <&reg_base3p3>;
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	captouch: touchscreen@38 {
115*4882a593Smuzhiyun		compatible = "edt,edt-ft5406";
116*4882a593Smuzhiyun		reg = <0x38>;
117*4882a593Smuzhiyun		pinctrl-names = "default";
118*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_irq_touch2 &pinctrl_emcon_gpio4>;
119*4882a593Smuzhiyun		interrupt-parent = <&gpio6>;
120*4882a593Smuzhiyun		interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
121*4882a593Smuzhiyun		wake-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
122*4882a593Smuzhiyun		wakeup-source;
123*4882a593Smuzhiyun	};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun	boardid: gpio@3a {
126*4882a593Smuzhiyun		compatible = "nxp,pca8574";
127*4882a593Smuzhiyun		reg = <0x3a>;
128*4882a593Smuzhiyun		gpio-controller;
129*4882a593Smuzhiyun		#gpio-cells = <2>;
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun&pcie {
134*4882a593Smuzhiyun	status = "okay";
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun&rgb_encoder {
138*4882a593Smuzhiyun	status = "okay";
139*4882a593Smuzhiyun};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun&rgb_panel {
142*4882a593Smuzhiyun	compatible = "edt,etm0700g0bdh6";
143*4882a593Smuzhiyun	status = "okay";
144*4882a593Smuzhiyun};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun&ssi2 {
147*4882a593Smuzhiyun	status = "okay";
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&uart2 {
151*4882a593Smuzhiyun	status = "okay";
152*4882a593Smuzhiyun	uart-has-rtscts;
153*4882a593Smuzhiyun};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun&uart3 {
156*4882a593Smuzhiyun	status = "okay";
157*4882a593Smuzhiyun};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun&uart4 {
160*4882a593Smuzhiyun	status = "okay";
161*4882a593Smuzhiyun};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun&uart5 {
164*4882a593Smuzhiyun	status = "okay";
165*4882a593Smuzhiyun};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun&usbh1 {
168*4882a593Smuzhiyun	status = "okay";
169*4882a593Smuzhiyun};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun&usbotg {
172*4882a593Smuzhiyun	status = "okay";
173*4882a593Smuzhiyun};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun&usdhc1 {
176*4882a593Smuzhiyun	status = "okay";
177*4882a593Smuzhiyun};
178