1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Protonic Holland 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include "imx6q.dtsi" 8*4882a593Smuzhiyun#include "imx6qdl-prti6q.dtsi" 9*4882a593Smuzhiyun#include <dt-bindings/leds/common.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "Protonic WD2 board"; 13*4882a593Smuzhiyun compatible = "prt,prtwd2", "fsl,imx6q"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun memory@10000000 { 16*4882a593Smuzhiyun device_type = "memory"; 17*4882a593Smuzhiyun reg = <0x10000000 0x20000000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@80000000 { 21*4882a593Smuzhiyun device_type = "memory"; 22*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun usdhc2_wifi_pwrseq: usdhc2_wifi_pwrseq { 26*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 27*4882a593Smuzhiyun pinctrl-names = "default"; 28*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_wifi_npd>; 29*4882a593Smuzhiyun reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* PRTWD2 rev 1 bitbang I2C for Ethernet Switch */ 33*4882a593Smuzhiyun i2c { 34*4882a593Smuzhiyun compatible = "i2c-gpio"; 35*4882a593Smuzhiyun pinctrl-names = "default"; 36*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c4>; 37*4882a593Smuzhiyun sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 38*4882a593Smuzhiyun scl-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; 39*4882a593Smuzhiyun i2c-gpio,delay-us = <20>; /* ~10 kHz */ 40*4882a593Smuzhiyun i2c-gpio,scl-output-only; 41*4882a593Smuzhiyun #address-cells = <1>; 42*4882a593Smuzhiyun #size-cells = <0>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&can1 { 47*4882a593Smuzhiyun pinctrl-names = "default"; 48*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>; 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun}; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun&fec { 53*4882a593Smuzhiyun pinctrl-names = "default"; 54*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_enet>; 55*4882a593Smuzhiyun phy-mode = "rmii"; 56*4882a593Smuzhiyun clocks = <&clks IMX6QDL_CLK_ENET>, 57*4882a593Smuzhiyun <&clks IMX6QDL_CLK_ENET>; 58*4882a593Smuzhiyun clock-names = "ipg", "ahb"; 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun fixed-link { 62*4882a593Smuzhiyun speed = <100>; 63*4882a593Smuzhiyun pause; 64*4882a593Smuzhiyun full-duplex; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun}; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun&i2c3 { 69*4882a593Smuzhiyun adc@49 { 70*4882a593Smuzhiyun compatible = "ti,ads1015"; 71*4882a593Smuzhiyun reg = <0x49>; 72*4882a593Smuzhiyun #address-cells = <1>; 73*4882a593Smuzhiyun #size-cells = <0>; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* V in */ 76*4882a593Smuzhiyun channel@4 { 77*4882a593Smuzhiyun reg = <4>; 78*4882a593Smuzhiyun ti,gain = <1>; 79*4882a593Smuzhiyun ti,datarate = <3>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* I charge */ 83*4882a593Smuzhiyun channel@5 { 84*4882a593Smuzhiyun reg = <5>; 85*4882a593Smuzhiyun ti,gain = <1>; 86*4882a593Smuzhiyun ti,datarate = <3>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* V bus */ 90*4882a593Smuzhiyun channel@6 { 91*4882a593Smuzhiyun reg = <6>; 92*4882a593Smuzhiyun ti,gain = <1>; 93*4882a593Smuzhiyun ti,datarate = <3>; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /* nc */ 97*4882a593Smuzhiyun channel@7 { 98*4882a593Smuzhiyun reg = <7>; 99*4882a593Smuzhiyun ti,gain = <1>; 100*4882a593Smuzhiyun ti,datarate = <3>; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&usdhc2 { 106*4882a593Smuzhiyun pinctrl-names = "default"; 107*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc2>; 108*4882a593Smuzhiyun no-1-8-v; 109*4882a593Smuzhiyun non-removable; 110*4882a593Smuzhiyun mmc-pwrseq = <&usdhc2_wifi_pwrseq>; 111*4882a593Smuzhiyun #address-cells = <1>; 112*4882a593Smuzhiyun #size-cells = <0>; 113*4882a593Smuzhiyun status = "okay"; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun wifi@1 { 116*4882a593Smuzhiyun compatible = "brcm,bcm4329-fmac"; 117*4882a593Smuzhiyun reg = <1>; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun}; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun&iomuxc { 122*4882a593Smuzhiyun pinctrl-names = "default"; 123*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usb_eth_chg>; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun pinctrl_can1phy: can1phy { 126*4882a593Smuzhiyun fsl,pins = < 127*4882a593Smuzhiyun /* CAN1_SR */ 128*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070 129*4882a593Smuzhiyun >; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun pinctrl_enet: enetgrp { 133*4882a593Smuzhiyun fsl,pins = < 134*4882a593Smuzhiyun /* MX6QDL_ENET_PINGRP4 */ 135*4882a593Smuzhiyun MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 136*4882a593Smuzhiyun MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 137*4882a593Smuzhiyun MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x130b0 138*4882a593Smuzhiyun MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 139*4882a593Smuzhiyun MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 140*4882a593Smuzhiyun MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 141*4882a593Smuzhiyun MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0 144*4882a593Smuzhiyun /* Phy reset */ 145*4882a593Smuzhiyun MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0 146*4882a593Smuzhiyun /* nINTRP */ 147*4882a593Smuzhiyun MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030 150*4882a593Smuzhiyun MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030 151*4882a593Smuzhiyun >; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun pinctrl_i2c4: i2c4grp { 155*4882a593Smuzhiyun fsl,pins = < 156*4882a593Smuzhiyun MX6QDL_PAD_ENET_MDIO__GPIO1_IO22 0x1f8b0 157*4882a593Smuzhiyun MX6QDL_PAD_ENET_MDC__GPIO1_IO31 0x1f8b0 158*4882a593Smuzhiyun >; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun pinctrl_usb_eth_chg: usbethchggrp { 162*4882a593Smuzhiyun fsl,pins = < 163*4882a593Smuzhiyun /* USB charging control */ 164*4882a593Smuzhiyun MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x130b0 165*4882a593Smuzhiyun MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x130b0 166*4882a593Smuzhiyun MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x130b0 167*4882a593Smuzhiyun MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x130b0 168*4882a593Smuzhiyun >; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun pinctrl_usdhc2: usdhc2grp { 172*4882a593Smuzhiyun fsl,pins = < 173*4882a593Smuzhiyun MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9 174*4882a593Smuzhiyun MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9 175*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 176*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 177*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 178*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 179*4882a593Smuzhiyun >; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun pinctrl_wifi_npd: wifinpd { 183*4882a593Smuzhiyun fsl,pins = < 184*4882a593Smuzhiyun /* WL_REG_ON */ 185*4882a593Smuzhiyun MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069 186*4882a593Smuzhiyun >; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun}; 189