xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx6q-logicpd.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun//
3*4882a593Smuzhiyun// Copyright (C) 2019 Logic PD, Inc.
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun/dts-v1/;
6*4882a593Smuzhiyun#include "imx6q.dtsi"
7*4882a593Smuzhiyun#include "imx6-logicpd-som.dtsi"
8*4882a593Smuzhiyun#include "imx6-logicpd-baseboard.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Logic PD i.MX6QD SOM-M3";
12*4882a593Smuzhiyun	compatible = "logicpd,imx6q-logicpd", "fsl,imx6q";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	backlight: backlight-lvds {
15*4882a593Smuzhiyun		compatible = "pwm-backlight";
16*4882a593Smuzhiyun		pwms = <&pwm3 0 20000 0>;
17*4882a593Smuzhiyun		brightness-levels = <0 4 8 16 32 64 128 255>;
18*4882a593Smuzhiyun		default-brightness-level = <6>;
19*4882a593Smuzhiyun		power-supply = <&reg_lcd>;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	panel-lvds0 {
23*4882a593Smuzhiyun		compatible = "okaya,rs800480t-7x0gp";
24*4882a593Smuzhiyun		power-supply = <&reg_lcd_reset>;
25*4882a593Smuzhiyun		backlight = <&backlight>;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		port {
28*4882a593Smuzhiyun			panel_in_lvds0: endpoint {
29*4882a593Smuzhiyun				remote-endpoint = <&lvds0_out>;
30*4882a593Smuzhiyun			};
31*4882a593Smuzhiyun		};
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	reg_lcd: regulator-lcd {
35*4882a593Smuzhiyun		pinctrl-names = "default";
36*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_lcd_reg>;
37*4882a593Smuzhiyun		compatible = "regulator-fixed";
38*4882a593Smuzhiyun		regulator-name = "lcd_panel_pwr";
39*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
40*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
41*4882a593Smuzhiyun		gpio = <&gpio4 17 GPIO_ACTIVE_HIGH>;
42*4882a593Smuzhiyun		enable-active-high;
43*4882a593Smuzhiyun		vin-supply = <&reg_3v3>;
44*4882a593Smuzhiyun		startup-delay-us = <500000>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	reg_lcd_reset: regulator-lcd-reset {
48*4882a593Smuzhiyun		pinctrl-names = "default";
49*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_lcd_reset>;
50*4882a593Smuzhiyun		compatible = "regulator-fixed";
51*4882a593Smuzhiyun		regulator-name = "nLCD_RESET";
52*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
53*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
54*4882a593Smuzhiyun		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
55*4882a593Smuzhiyun		enable-active-high;
56*4882a593Smuzhiyun		vin-supply = <&reg_lcd>;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun&clks {
61*4882a593Smuzhiyun	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
62*4882a593Smuzhiyun			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
63*4882a593Smuzhiyun			  <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
64*4882a593Smuzhiyun			  <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
65*4882a593Smuzhiyun	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
66*4882a593Smuzhiyun				 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
67*4882a593Smuzhiyun				 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
68*4882a593Smuzhiyun				 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
69*4882a593Smuzhiyun};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun&hdmi {
72*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c3>;
73*4882a593Smuzhiyun	status = "okay";
74*4882a593Smuzhiyun};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun&i2c1 {
77*4882a593Smuzhiyun	touchscreen@26 {
78*4882a593Smuzhiyun		compatible = "ilitek,ili2117";
79*4882a593Smuzhiyun		reg = <0x26>;
80*4882a593Smuzhiyun		pinctrl-names = "default";
81*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_touchscreen>;
82*4882a593Smuzhiyun		interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_RISING>;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun&ldb {
87*4882a593Smuzhiyun	status = "okay";
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	lvds-channel@0 {
90*4882a593Smuzhiyun		fsl,data-mapping = "spwg";
91*4882a593Smuzhiyun		fsl,data-width = <24>;
92*4882a593Smuzhiyun		status = "okay";
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		port@4 {
95*4882a593Smuzhiyun			reg = <4>;
96*4882a593Smuzhiyun			lvds0_out: endpoint {
97*4882a593Smuzhiyun				remote-endpoint = <&panel_in_lvds0>;
98*4882a593Smuzhiyun			};
99*4882a593Smuzhiyun		};
100*4882a593Smuzhiyun	};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&pwm3 {
105*4882a593Smuzhiyun	status = "okay";
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&reg_hdmi {
109*4882a593Smuzhiyun	regulator-always-on;	/* Without this, the level shifter on HDMI doesn't turn on */
110*4882a593Smuzhiyun};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun&iomuxc {
113*4882a593Smuzhiyun	pinctrl_lcd_reg: lcdreg {
114*4882a593Smuzhiyun		fsl,pins = <
115*4882a593Smuzhiyun			MX6QDL_PAD_DI0_PIN15__GPIO4_IO17	0x100b0	/* R_LCD_PANEL_PWR */
116*4882a593Smuzhiyun		>;
117*4882a593Smuzhiyun	};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun	pinctrl_lcd_reset: lcdreset {
120*4882a593Smuzhiyun		fsl,pins = <
121*4882a593Smuzhiyun			MX6QDL_PAD_EIM_A25__GPIO5_IO02	0x100b0	/* LCD_nRESET */
122*4882a593Smuzhiyun		>;
123*4882a593Smuzhiyun	};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun	pinctrl_touchscreen: touchscreengrp {
126*4882a593Smuzhiyun		fsl,pins = <
127*4882a593Smuzhiyun			MX6QDL_PAD_GPIO_6__GPIO1_IO06	0x1b0b0	/* TOUCH_nPINTDAV */
128*4882a593Smuzhiyun		>;
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun};
131