1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2015 Lucas Stach <kernel@pengutronix.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License 11*4882a593Smuzhiyun * version 2 as published by the Free Software Foundation. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 14*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*4882a593Smuzhiyun * GNU General Public License for more details. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * Or, alternatively, 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 21*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 22*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 23*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 24*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 25*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 26*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 27*4882a593Smuzhiyun * conditions: 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 30*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 31*4882a593Smuzhiyun * 32*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 33*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 37*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun/dts-v1/; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun#include "imx6q.dtsi" 45*4882a593Smuzhiyun#include "imx6qdl-sr-som.dtsi" 46*4882a593Smuzhiyun#include "imx6qdl-sr-som-brcm.dtsi" 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun/ { 49*4882a593Smuzhiyun model = "Auvidea H100"; 50*4882a593Smuzhiyun compatible = "auvidea,h100", "fsl,imx6q"; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* Will be filled by the bootloader */ 53*4882a593Smuzhiyun memory@10000000 { 54*4882a593Smuzhiyun device_type = "memory"; 55*4882a593Smuzhiyun reg = <0x10000000 0>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun aliases { 59*4882a593Smuzhiyun rtc0 = &rtc; 60*4882a593Smuzhiyun rtc1 = &snvs_rtc; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun chosen { 64*4882a593Smuzhiyun stdout-path = &uart2; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun hdmi_osc: hdmi-osc { 68*4882a593Smuzhiyun compatible = "fixed-clock"; 69*4882a593Smuzhiyun clock-output-names = "hdmi-osc"; 70*4882a593Smuzhiyun clock-frequency = <27000000>; 71*4882a593Smuzhiyun #clock-cells = <0>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun leds { 75*4882a593Smuzhiyun compatible = "gpio-leds"; 76*4882a593Smuzhiyun pinctrl-names = "default"; 77*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_leds>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun led0: power { 80*4882a593Smuzhiyun label = "power"; 81*4882a593Smuzhiyun gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; 82*4882a593Smuzhiyun default-state = "on"; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun led1: stream { 86*4882a593Smuzhiyun label = "stream"; 87*4882a593Smuzhiyun gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; 88*4882a593Smuzhiyun default-state = "off"; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun led2: rec { 92*4882a593Smuzhiyun label = "rec"; 93*4882a593Smuzhiyun gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; 94*4882a593Smuzhiyun default-state = "off"; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun reg_3p3v: regulator-3p3v { 99*4882a593Smuzhiyun compatible = "regulator-fixed"; 100*4882a593Smuzhiyun regulator-name = "3P3V"; 101*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 102*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun reg_hdmi: regulator-hdmi { 106*4882a593Smuzhiyun pinctrl-names = "default"; 107*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_reg_hdmi>; 108*4882a593Smuzhiyun compatible = "regulator-fixed"; 109*4882a593Smuzhiyun enable-active-high; 110*4882a593Smuzhiyun gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; 111*4882a593Smuzhiyun regulator-name = "V_HDMI"; 112*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 113*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 114*4882a593Smuzhiyun regulator-always-on; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun reg_usbh1_vbus: regulator-usb-h1-vbus { 118*4882a593Smuzhiyun compatible = "regulator-fixed"; 119*4882a593Smuzhiyun enable-active-high; 120*4882a593Smuzhiyun gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 121*4882a593Smuzhiyun pinctrl-names = "default"; 122*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_usbh1_vbus>; 123*4882a593Smuzhiyun regulator-name = "USB_H1_VBUS"; 124*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 125*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun reg_usbotg_vbus: regulator-usb-otg-vbus { 129*4882a593Smuzhiyun compatible = "regulator-fixed"; 130*4882a593Smuzhiyun enable-active-high; 131*4882a593Smuzhiyun gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 132*4882a593Smuzhiyun pinctrl-names = "default"; 133*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_usbotg_vbus>; 134*4882a593Smuzhiyun regulator-name = "USB_OTG_VBUS"; 135*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 136*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun sound-sgtl5000 { 140*4882a593Smuzhiyun compatible = "fsl,imx-audio-sgtl5000"; 141*4882a593Smuzhiyun model = "H100 on-board codec"; 142*4882a593Smuzhiyun audio-codec = <&sgtl5000>; 143*4882a593Smuzhiyun audio-routing = 144*4882a593Smuzhiyun "MIC_IN", "Mic Jack", 145*4882a593Smuzhiyun "Mic Jack", "Mic Bias", 146*4882a593Smuzhiyun "Headphone Jack", "HP_OUT"; 147*4882a593Smuzhiyun mux-ext-port = <5>; 148*4882a593Smuzhiyun mux-int-port = <1>; 149*4882a593Smuzhiyun ssi-controller = <&ssi1>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun}; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun&audmux { 154*4882a593Smuzhiyun status = "okay"; 155*4882a593Smuzhiyun}; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun&hdmi { 158*4882a593Smuzhiyun pinctrl-names = "default"; 159*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_hdmi>; 160*4882a593Smuzhiyun ddc-i2c-bus = <&i2c2>; 161*4882a593Smuzhiyun status = "okay"; 162*4882a593Smuzhiyun}; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun&i2c1 { 165*4882a593Smuzhiyun pinctrl-names = "default"; 166*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_i2c1>; 167*4882a593Smuzhiyun status = "okay"; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun eeprom: 24c02@51 { 170*4882a593Smuzhiyun compatible = "microchip,24c02", "atmel,24c02"; 171*4882a593Smuzhiyun reg = <0x51>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun rtc: pcf8523@68 { 175*4882a593Smuzhiyun compatible = "nxp,pcf8523"; 176*4882a593Smuzhiyun reg = <0x68>; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun sgtl5000: sgtl5000@a { 180*4882a593Smuzhiyun compatible = "fsl,sgtl5000"; 181*4882a593Smuzhiyun reg = <0x0a>; 182*4882a593Smuzhiyun pinctrl-names = "default"; 183*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_sgtl5000>; 184*4882a593Smuzhiyun clocks = <&clks IMX6QDL_CLK_CKO>; 185*4882a593Smuzhiyun VDDA-supply = <®_3p3v>; 186*4882a593Smuzhiyun VDDIO-supply = <®_3p3v>; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun tc358743: tc358743@f { 190*4882a593Smuzhiyun compatible = "toshiba,tc358743"; 191*4882a593Smuzhiyun reg = <0x0f>; 192*4882a593Smuzhiyun pinctrl-names = "default"; 193*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_tc358743>; 194*4882a593Smuzhiyun clocks = <&hdmi_osc>; 195*4882a593Smuzhiyun clock-names = "refclk"; 196*4882a593Smuzhiyun reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; 197*4882a593Smuzhiyun /* IRQ has a wrong pull resistor which renders it useless */ 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun port { 200*4882a593Smuzhiyun tc358743_out: endpoint { 201*4882a593Smuzhiyun remote-endpoint = <&mipi_csi2_in>; 202*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 203*4882a593Smuzhiyun clock-lanes = <0>; 204*4882a593Smuzhiyun clock-noncontinuous; 205*4882a593Smuzhiyun link-frequencies = /bits/ 64 <297000000>; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun}; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun&i2c2 { 212*4882a593Smuzhiyun clock-frequency = <100000>; 213*4882a593Smuzhiyun pinctrl-names = "default"; 214*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_i2c2>; 215*4882a593Smuzhiyun status = "okay"; 216*4882a593Smuzhiyun}; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun&iomuxc { 219*4882a593Smuzhiyun h100 { 220*4882a593Smuzhiyun pinctrl_h100_hdmi: h100-hdmi { 221*4882a593Smuzhiyun fsl,pins = < 222*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 223*4882a593Smuzhiyun >; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun pinctrl_h100_i2c1: h100-i2c1 { 227*4882a593Smuzhiyun fsl,pins = < 228*4882a593Smuzhiyun MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 229*4882a593Smuzhiyun MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 230*4882a593Smuzhiyun >; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun pinctrl_h100_i2c2: h100-i2c2 { 234*4882a593Smuzhiyun fsl,pins = < 235*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 236*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 237*4882a593Smuzhiyun >; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun pinctrl_h100_leds: pinctrl-h100-leds { 241*4882a593Smuzhiyun fsl,pins = < 242*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b0 243*4882a593Smuzhiyun MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0 244*4882a593Smuzhiyun MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0 245*4882a593Smuzhiyun >; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun pinctrl_h100_reg_hdmi: h100-reg-hdmi { 249*4882a593Smuzhiyun fsl,pins = < 250*4882a593Smuzhiyun MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0 251*4882a593Smuzhiyun >; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun pinctrl_h100_sgtl5000: h100-sgtl5000 { 255*4882a593Smuzhiyun fsl,pins = < 256*4882a593Smuzhiyun MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 257*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 258*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0 259*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 260*4882a593Smuzhiyun MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0 261*4882a593Smuzhiyun >; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun pinctrl_h100_tc358743: h100-tc358743 { 265*4882a593Smuzhiyun fsl,pins = < 266*4882a593Smuzhiyun MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 267*4882a593Smuzhiyun >; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun pinctrl_h100_uart2: h100-uart2 { 271*4882a593Smuzhiyun fsl,pins = < 272*4882a593Smuzhiyun MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 273*4882a593Smuzhiyun MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 274*4882a593Smuzhiyun >; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun pinctrl_h100_usbh1_vbus: hummingboard-usbh1-vbus { 278*4882a593Smuzhiyun fsl,pins = < 279*4882a593Smuzhiyun MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 280*4882a593Smuzhiyun >; 281*4882a593Smuzhiyun }; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun pinctrl_h100_usbotg_id: hummingboard-usbotg-id { 284*4882a593Smuzhiyun fsl,pins = < 285*4882a593Smuzhiyun MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 286*4882a593Smuzhiyun >; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun pinctrl_h100_usbotg_vbus: hummingboard-usbotg-vbus { 290*4882a593Smuzhiyun fsl,pins = < 291*4882a593Smuzhiyun MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 292*4882a593Smuzhiyun >; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun pinctrl_h100_usdhc2: h100-usdhc2 { 296*4882a593Smuzhiyun fsl,pins = < 297*4882a593Smuzhiyun MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071 298*4882a593Smuzhiyun MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 299*4882a593Smuzhiyun MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 300*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 301*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 302*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 303*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059 304*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0 305*4882a593Smuzhiyun >; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun pinctrl_h100_usdhc2_100mhz: h100-usdhc2-100mhz { 309*4882a593Smuzhiyun fsl,pins = < 310*4882a593Smuzhiyun MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071 311*4882a593Smuzhiyun MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9 312*4882a593Smuzhiyun MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9 313*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 314*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 315*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 316*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 317*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0 318*4882a593Smuzhiyun >; 319*4882a593Smuzhiyun }; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun pinctrl_h100_usdhc2_200mhz: h100-usdhc2-200mhz { 322*4882a593Smuzhiyun fsl,pins = < 323*4882a593Smuzhiyun MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071 324*4882a593Smuzhiyun MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 325*4882a593Smuzhiyun MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 326*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 327*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 328*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 329*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 330*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0 331*4882a593Smuzhiyun >; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun}; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun&mipi_csi { 337*4882a593Smuzhiyun status = "okay"; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun port { 340*4882a593Smuzhiyun mipi_csi2_in: endpoint { 341*4882a593Smuzhiyun remote-endpoint = <&tc358743_out>; 342*4882a593Smuzhiyun data-lanes = <1 2 3 4>; 343*4882a593Smuzhiyun clock-lanes = <0>; 344*4882a593Smuzhiyun clock-noncontinuous; 345*4882a593Smuzhiyun link-frequencies = /bits/ 64 <297000000>; 346*4882a593Smuzhiyun }; 347*4882a593Smuzhiyun }; 348*4882a593Smuzhiyun}; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun&ssi1 { 351*4882a593Smuzhiyun status = "okay"; 352*4882a593Smuzhiyun}; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun&uart2 { 355*4882a593Smuzhiyun pinctrl-names = "default"; 356*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_uart2>; 357*4882a593Smuzhiyun status = "okay"; 358*4882a593Smuzhiyun}; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun&usbh1 { 361*4882a593Smuzhiyun disable-over-current; 362*4882a593Smuzhiyun vbus-supply = <®_usbh1_vbus>; 363*4882a593Smuzhiyun status = "okay"; 364*4882a593Smuzhiyun}; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun&usbotg { 367*4882a593Smuzhiyun disable-over-current; 368*4882a593Smuzhiyun pinctrl-names = "default"; 369*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_usbotg_id>; 370*4882a593Smuzhiyun vbus-supply = <®_usbotg_vbus>; 371*4882a593Smuzhiyun status = "okay"; 372*4882a593Smuzhiyun}; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun&usdhc2 { 375*4882a593Smuzhiyun pinctrl-names = "default", "state_100mhz", "state_200mhz"; 376*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_h100_usdhc2>; 377*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_h100_usdhc2_100mhz>; 378*4882a593Smuzhiyun pinctrl-2 = <&pinctrl_h100_usdhc2_200mhz>; 379*4882a593Smuzhiyun vmmc-supply = <®_3p3v>; 380*4882a593Smuzhiyun cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 381*4882a593Smuzhiyun status = "okay"; 382*4882a593Smuzhiyun}; 383