xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx6q-gk802.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (C) 2013 Philipp Zabel
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License
5*4882a593Smuzhiyun * version 2.  This program is licensed "as is" without any warranty of any
6*4882a593Smuzhiyun * kind, whether express or implied.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/dts-v1/;
10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
11*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
12*4882a593Smuzhiyun#include "imx6q.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "Zealz GK802";
16*4882a593Smuzhiyun	compatible = "zealz,imx6q-gk802", "fsl,imx6q";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	chosen {
19*4882a593Smuzhiyun		stdout-path = &uart4;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	memory@10000000 {
23*4882a593Smuzhiyun		device_type = "memory";
24*4882a593Smuzhiyun		reg = <0x10000000 0x40000000>;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	regulators {
28*4882a593Smuzhiyun		compatible = "simple-bus";
29*4882a593Smuzhiyun		#address-cells = <1>;
30*4882a593Smuzhiyun		#size-cells = <0>;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		reg_3p3v: regulator@0 {
33*4882a593Smuzhiyun			compatible = "regulator-fixed";
34*4882a593Smuzhiyun			reg = <0>;
35*4882a593Smuzhiyun			regulator-name = "3P3V";
36*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
37*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
38*4882a593Smuzhiyun			regulator-always-on;
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	gpio-keys {
43*4882a593Smuzhiyun		compatible = "gpio-keys";
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun		recovery-button {
46*4882a593Smuzhiyun			label = "recovery";
47*4882a593Smuzhiyun			gpios = <&gpio3 16 1>;
48*4882a593Smuzhiyun			linux,code = <KEY_RESTART>;
49*4882a593Smuzhiyun			wakeup-source;
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun&hdmi {
55*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c3>;
56*4882a593Smuzhiyun	status = "okay";
57*4882a593Smuzhiyun};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun/* Internal I2C */
60*4882a593Smuzhiyun&i2c2 {
61*4882a593Smuzhiyun	pinctrl-names = "default";
62*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_i2c2>;
63*4882a593Smuzhiyun	clock-frequency = <100000>;
64*4882a593Smuzhiyun	status = "okay";
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	/* SDMC DM2016 1024 bit EEPROM + 128 bit OTP */
67*4882a593Smuzhiyun	eeprom: dm2016@51 {
68*4882a593Smuzhiyun		compatible = "sdmc,dm2016";
69*4882a593Smuzhiyun		reg = <0x51>;
70*4882a593Smuzhiyun	};
71*4882a593Smuzhiyun};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun/* External I2C via HDMI */
74*4882a593Smuzhiyun&i2c3 {
75*4882a593Smuzhiyun	pinctrl-names = "default";
76*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_i2c3>;
77*4882a593Smuzhiyun	clock-frequency = <100000>;
78*4882a593Smuzhiyun	status = "okay";
79*4882a593Smuzhiyun};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun&iomuxc {
82*4882a593Smuzhiyun	pinctrl-names = "default";
83*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_hog>;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	imx6q-gk802 {
86*4882a593Smuzhiyun		pinctrl_hog: hoggrp {
87*4882a593Smuzhiyun			fsl,pins = <
88*4882a593Smuzhiyun				/* Recovery button, active-low */
89*4882a593Smuzhiyun				MX6QDL_PAD_EIM_D16__GPIO3_IO16  0x100b1
90*4882a593Smuzhiyun				/* RTL8192CU enable GPIO, active-low */
91*4882a593Smuzhiyun				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
92*4882a593Smuzhiyun			>;
93*4882a593Smuzhiyun		};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		pinctrl_i2c2: i2c2grp {
96*4882a593Smuzhiyun			fsl,pins = <
97*4882a593Smuzhiyun				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
98*4882a593Smuzhiyun				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
99*4882a593Smuzhiyun			>;
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		pinctrl_i2c3: i2c3grp {
103*4882a593Smuzhiyun			fsl,pins = <
104*4882a593Smuzhiyun				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
105*4882a593Smuzhiyun				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1
106*4882a593Smuzhiyun			>;
107*4882a593Smuzhiyun		};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		pinctrl_uart4: uart4grp {
110*4882a593Smuzhiyun			fsl,pins = <
111*4882a593Smuzhiyun				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
112*4882a593Smuzhiyun				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
113*4882a593Smuzhiyun			>;
114*4882a593Smuzhiyun		};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun		pinctrl_usdhc3: usdhc3grp {
117*4882a593Smuzhiyun			fsl,pins = <
118*4882a593Smuzhiyun				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
119*4882a593Smuzhiyun				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
120*4882a593Smuzhiyun				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
121*4882a593Smuzhiyun				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
122*4882a593Smuzhiyun				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
123*4882a593Smuzhiyun				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
124*4882a593Smuzhiyun			>;
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		pinctrl_usdhc4: usdhc4grp {
128*4882a593Smuzhiyun			fsl,pins = <
129*4882a593Smuzhiyun				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
130*4882a593Smuzhiyun				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
131*4882a593Smuzhiyun				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
132*4882a593Smuzhiyun				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
133*4882a593Smuzhiyun				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
134*4882a593Smuzhiyun				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
135*4882a593Smuzhiyun			>;
136*4882a593Smuzhiyun		};
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&uart2 {
141*4882a593Smuzhiyun	status = "okay";
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun&uart4 {
145*4882a593Smuzhiyun	pinctrl-names = "default";
146*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_uart4>;
147*4882a593Smuzhiyun	status = "okay";
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun/* External USB-A port (USBOTG) */
151*4882a593Smuzhiyun&usbotg {
152*4882a593Smuzhiyun	disable-over-current;
153*4882a593Smuzhiyun	status = "okay";
154*4882a593Smuzhiyun};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun/* Internal USB port (USBH1), connected to RTL8192CU */
157*4882a593Smuzhiyun&usbh1 {
158*4882a593Smuzhiyun	disable-over-current;
159*4882a593Smuzhiyun	status = "okay";
160*4882a593Smuzhiyun};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun/* External microSD */
163*4882a593Smuzhiyun&usdhc3 {
164*4882a593Smuzhiyun	pinctrl-names = "default";
165*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usdhc3>;
166*4882a593Smuzhiyun	bus-width = <4>;
167*4882a593Smuzhiyun	cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
168*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
169*4882a593Smuzhiyun	status = "okay";
170*4882a593Smuzhiyun};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun/* Internal microSD */
173*4882a593Smuzhiyun&usdhc4 {
174*4882a593Smuzhiyun	pinctrl-names = "default";
175*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usdhc4>;
176*4882a593Smuzhiyun	bus-width = <4>;
177*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
178*4882a593Smuzhiyun	status = "okay";
179*4882a593Smuzhiyun};
180