1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright 2015 Timesys Corporation. 3*4882a593Smuzhiyun * Copyright 2015 General Electric Company 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 6*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 7*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 8*4882a593Smuzhiyun * whole. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 11*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License 12*4882a593Smuzhiyun * version 2 as published by the Free Software Foundation. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 15*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*4882a593Smuzhiyun * GNU General Public License for more details. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * Or, alternatively, 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 22*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 23*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 24*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 25*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 26*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 27*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 28*4882a593Smuzhiyun * conditions: 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 31*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun/dts-v1/; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun#include "imx6q-bx50v3.dtsi" 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun/ { 48*4882a593Smuzhiyun model = "General Electric B850v3"; 49*4882a593Smuzhiyun compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun chosen { 52*4882a593Smuzhiyun stdout-path = &uart3; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun}; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun&ldb { 57*4882a593Smuzhiyun fsl,dual-channel; 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun lvds0: lvds-channel@0 { 61*4882a593Smuzhiyun fsl,data-mapping = "spwg"; 62*4882a593Smuzhiyun fsl,data-width = <24>; 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun port@4 { 66*4882a593Smuzhiyun reg = <4>; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun lvds0_out: endpoint { 69*4882a593Smuzhiyun remote-endpoint = <&stdp4028_in>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&i2c2 { 76*4882a593Smuzhiyun pca9547_ddc: mux@70 { 77*4882a593Smuzhiyun compatible = "nxp,pca9547"; 78*4882a593Smuzhiyun reg = <0x70>; 79*4882a593Smuzhiyun #address-cells = <1>; 80*4882a593Smuzhiyun #size-cells = <0>; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun mux2_i2c1: i2c@0 { 83*4882a593Smuzhiyun #address-cells = <1>; 84*4882a593Smuzhiyun #size-cells = <0>; 85*4882a593Smuzhiyun reg = <0x0>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun mux2_i2c2: i2c@1 { 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <0>; 91*4882a593Smuzhiyun reg = <0x1>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun mux2_i2c3: i2c@2 { 95*4882a593Smuzhiyun #address-cells = <1>; 96*4882a593Smuzhiyun #size-cells = <0>; 97*4882a593Smuzhiyun reg = <0x2>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun mux2_i2c4: i2c@3 { 101*4882a593Smuzhiyun #address-cells = <1>; 102*4882a593Smuzhiyun #size-cells = <0>; 103*4882a593Smuzhiyun reg = <0x3>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun mux2_i2c5: i2c@4 { 107*4882a593Smuzhiyun #address-cells = <1>; 108*4882a593Smuzhiyun #size-cells = <0>; 109*4882a593Smuzhiyun reg = <0x4>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun mux2_i2c6: i2c@5 { 113*4882a593Smuzhiyun #address-cells = <1>; 114*4882a593Smuzhiyun #size-cells = <0>; 115*4882a593Smuzhiyun reg = <0x5>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun mux2_i2c7: i2c@6 { 119*4882a593Smuzhiyun #address-cells = <1>; 120*4882a593Smuzhiyun #size-cells = <0>; 121*4882a593Smuzhiyun reg = <0x6>; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun mux2_i2c8: i2c@7 { 125*4882a593Smuzhiyun #address-cells = <1>; 126*4882a593Smuzhiyun #size-cells = <0>; 127*4882a593Smuzhiyun reg = <0x7>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun}; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun&hdmi { 133*4882a593Smuzhiyun ddc-i2c-bus = <&mux2_i2c1>; 134*4882a593Smuzhiyun}; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun&mux1_i2c1 { 137*4882a593Smuzhiyun ads7830@4a { 138*4882a593Smuzhiyun compatible = "ti,ads7830"; 139*4882a593Smuzhiyun reg = <0x4a>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&mux2_i2c2 { 144*4882a593Smuzhiyun clock-frequency = <100000>; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun stdp2690@72 { 147*4882a593Smuzhiyun compatible = "megachips,stdp2690-ge-b850v3-fw"; 148*4882a593Smuzhiyun reg = <0x72>; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun ports { 151*4882a593Smuzhiyun #address-cells = <1>; 152*4882a593Smuzhiyun #size-cells = <0>; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun port@0 { 155*4882a593Smuzhiyun reg = <0>; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun stdp2690_in: endpoint { 158*4882a593Smuzhiyun remote-endpoint = <&stdp4028_out>; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun port@1 { 163*4882a593Smuzhiyun reg = <1>; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun stdp2690_out: endpoint { 166*4882a593Smuzhiyun /* Connector for external display */ 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun stdp4028@73 { 173*4882a593Smuzhiyun compatible = "megachips,stdp4028-ge-b850v3-fw"; 174*4882a593Smuzhiyun reg = <0x73>; 175*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 176*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun ports { 179*4882a593Smuzhiyun #address-cells = <1>; 180*4882a593Smuzhiyun #size-cells = <0>; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun port@0 { 183*4882a593Smuzhiyun reg = <0>; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun stdp4028_in: endpoint { 186*4882a593Smuzhiyun remote-endpoint = <&lvds0_out>; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun port@1 { 191*4882a593Smuzhiyun reg = <1>; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun stdp4028_out: endpoint { 194*4882a593Smuzhiyun remote-endpoint = <&stdp2690_in>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun}; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun&pca9539 { 202*4882a593Smuzhiyun P10-hog { 203*4882a593Smuzhiyun gpio-hog; 204*4882a593Smuzhiyun gpios = <8 0>; 205*4882a593Smuzhiyun output-low; 206*4882a593Smuzhiyun line-name = "PCA9539-P10"; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun P11-hog { 210*4882a593Smuzhiyun gpio-hog; 211*4882a593Smuzhiyun gpios = <9 0>; 212*4882a593Smuzhiyun output-low; 213*4882a593Smuzhiyun line-name = "PCA9539-P11"; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun}; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun&pci_root { 218*4882a593Smuzhiyun /* PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch */ 219*4882a593Smuzhiyun bridge@1,0 { 220*4882a593Smuzhiyun compatible = "pci10b5,8605"; 221*4882a593Smuzhiyun reg = <0x00010000 0 0 0 0>; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun #address-cells = <3>; 224*4882a593Smuzhiyun #size-cells = <2>; 225*4882a593Smuzhiyun #interrupt-cells = <1>; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun bridge@2,1 { 228*4882a593Smuzhiyun compatible = "pci10b5,8605"; 229*4882a593Smuzhiyun reg = <0x00020800 0 0 0 0>; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun #address-cells = <3>; 232*4882a593Smuzhiyun #size-cells = <2>; 233*4882a593Smuzhiyun #interrupt-cells = <1>; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun /* Intel Corporation I210 Gigabit Network Connection */ 236*4882a593Smuzhiyun ethernet@3,0 { 237*4882a593Smuzhiyun compatible = "pci8086,1533"; 238*4882a593Smuzhiyun reg = <0x00030000 0 0 0 0>; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun bridge@2,2 { 243*4882a593Smuzhiyun compatible = "pci10b5,8605"; 244*4882a593Smuzhiyun reg = <0x00021000 0 0 0 0>; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun #address-cells = <3>; 247*4882a593Smuzhiyun #size-cells = <2>; 248*4882a593Smuzhiyun #interrupt-cells = <1>; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun /* Intel Corporation I210 Gigabit Network Connection */ 251*4882a593Smuzhiyun switch_nic: ethernet@4,0 { 252*4882a593Smuzhiyun compatible = "pci8086,1533"; 253*4882a593Smuzhiyun reg = <0x00040000 0 0 0 0>; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun}; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun&switch_ports { 260*4882a593Smuzhiyun port@0 { 261*4882a593Smuzhiyun reg = <0>; 262*4882a593Smuzhiyun label = "eneport1"; 263*4882a593Smuzhiyun phy-handle = <&switchphy0>; 264*4882a593Smuzhiyun }; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun port@1 { 267*4882a593Smuzhiyun reg = <1>; 268*4882a593Smuzhiyun label = "eneport2"; 269*4882a593Smuzhiyun phy-handle = <&switchphy1>; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun port@2 { 273*4882a593Smuzhiyun reg = <2>; 274*4882a593Smuzhiyun label = "enix"; 275*4882a593Smuzhiyun phy-handle = <&switchphy2>; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun port@3 { 279*4882a593Smuzhiyun reg = <3>; 280*4882a593Smuzhiyun label = "enid"; 281*4882a593Smuzhiyun phy-handle = <&switchphy3>; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun port@4 { 285*4882a593Smuzhiyun reg = <4>; 286*4882a593Smuzhiyun label = "cpu"; 287*4882a593Smuzhiyun ethernet = <&switch_nic>; 288*4882a593Smuzhiyun phy-handle = <&switchphy4>; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun}; 291