xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx6q-apalis-ixora.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2014-2020 Toradex
4*4882a593Smuzhiyun * Copyright 2012 Freescale Semiconductor, Inc.
5*4882a593Smuzhiyun * Copyright 2011 Linaro Ltd.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
11*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
12*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
13*4882a593Smuzhiyun#include "imx6q.dtsi"
14*4882a593Smuzhiyun#include "imx6qdl-apalis.dtsi"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun/ {
17*4882a593Smuzhiyun	model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board";
18*4882a593Smuzhiyun	compatible = "toradex,apalis_imx6q-ixora", "toradex,apalis_imx6q",
19*4882a593Smuzhiyun		     "fsl,imx6q";
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	aliases {
22*4882a593Smuzhiyun		i2c0 = &i2c1;
23*4882a593Smuzhiyun		i2c1 = &i2c3;
24*4882a593Smuzhiyun		i2c2 = &i2c2;
25*4882a593Smuzhiyun		rtc0 = &rtc_i2c;
26*4882a593Smuzhiyun		rtc1 = &snvs_rtc;
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	chosen {
30*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	gpio-keys {
34*4882a593Smuzhiyun		compatible = "gpio-keys";
35*4882a593Smuzhiyun		pinctrl-names = "default";
36*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_gpio_keys>;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		wakeup {
39*4882a593Smuzhiyun			label = "Wake-Up";
40*4882a593Smuzhiyun			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
41*4882a593Smuzhiyun			linux,code = <KEY_WAKEUP>;
42*4882a593Smuzhiyun			debounce-interval = <10>;
43*4882a593Smuzhiyun			wakeup-source;
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	lcd_display: disp0 {
48*4882a593Smuzhiyun		compatible = "fsl,imx-parallel-display";
49*4882a593Smuzhiyun		#address-cells = <1>;
50*4882a593Smuzhiyun		#size-cells = <0>;
51*4882a593Smuzhiyun		interface-pix-fmt = "rgb24";
52*4882a593Smuzhiyun		pinctrl-names = "default";
53*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_ipu1_lcdif>;
54*4882a593Smuzhiyun		status = "okay";
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		port@0 {
57*4882a593Smuzhiyun			reg = <0>;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun			lcd_display_in: endpoint {
60*4882a593Smuzhiyun				remote-endpoint = <&ipu1_di1_disp1>;
61*4882a593Smuzhiyun			};
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun		port@1 {
65*4882a593Smuzhiyun			reg = <1>;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun			lcd_display_out: endpoint {
68*4882a593Smuzhiyun				remote-endpoint = <&lcd_panel_in>;
69*4882a593Smuzhiyun			};
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	panel: panel {
74*4882a593Smuzhiyun		/*
75*4882a593Smuzhiyun		 * edt,et057090dhu: EDT 5.7" LCD TFT
76*4882a593Smuzhiyun		 * edt,et070080dh6: EDT 7.0" LCD TFT
77*4882a593Smuzhiyun		 */
78*4882a593Smuzhiyun		compatible = "edt,et057090dhu";
79*4882a593Smuzhiyun		backlight = <&backlight>;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		port {
82*4882a593Smuzhiyun			lcd_panel_in: endpoint {
83*4882a593Smuzhiyun				remote-endpoint = <&lcd_display_out>;
84*4882a593Smuzhiyun			};
85*4882a593Smuzhiyun		};
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun	leds {
89*4882a593Smuzhiyun		compatible = "gpio-leds";
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun		pinctrl-names = "default";
92*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_leds_ixora>;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		led4-green {
95*4882a593Smuzhiyun			label = "LED_4_GREEN";
96*4882a593Smuzhiyun			gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		led4-red {
100*4882a593Smuzhiyun			label = "LED_4_RED";
101*4882a593Smuzhiyun			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun		led5-green {
105*4882a593Smuzhiyun			label = "LED_5_GREEN";
106*4882a593Smuzhiyun			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
107*4882a593Smuzhiyun		};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		led5-red {
110*4882a593Smuzhiyun			label = "LED_5_RED";
111*4882a593Smuzhiyun			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
112*4882a593Smuzhiyun		};
113*4882a593Smuzhiyun	};
114*4882a593Smuzhiyun};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun&backlight {
117*4882a593Smuzhiyun	brightness-levels = <0 127 191 223 239 247 251 255>;
118*4882a593Smuzhiyun	default-brightness-level = <1>;
119*4882a593Smuzhiyun	status = "okay";
120*4882a593Smuzhiyun};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun&can1 {
123*4882a593Smuzhiyun	status = "okay";
124*4882a593Smuzhiyun};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun&can2 {
127*4882a593Smuzhiyun	status = "okay";
128*4882a593Smuzhiyun};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun&hdmi {
131*4882a593Smuzhiyun	status = "okay";
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
135*4882a593Smuzhiyun&i2c1 {
136*4882a593Smuzhiyun	status = "okay";
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun	/*
139*4882a593Smuzhiyun	 * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>,
140*4882a593Smuzhiyun	 * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms
141*4882a593Smuzhiyun	 */
142*4882a593Smuzhiyun	touchscreen@4a {
143*4882a593Smuzhiyun		compatible = "atmel,maxtouch";
144*4882a593Smuzhiyun		reg = <0x4a>;
145*4882a593Smuzhiyun		interrupt-parent = <&gpio6>;
146*4882a593Smuzhiyun		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
147*4882a593Smuzhiyun		reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */
148*4882a593Smuzhiyun		status = "disabled";
149*4882a593Smuzhiyun	};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun	eeprom@50 {
152*4882a593Smuzhiyun		compatible = "atmel,24c02";
153*4882a593Smuzhiyun		reg = <0x50>;
154*4882a593Smuzhiyun	};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun	/* M41T0M6 real time clock on carrier board */
157*4882a593Smuzhiyun	rtc_i2c: rtc@68 {
158*4882a593Smuzhiyun		compatible = "st,m41t0";
159*4882a593Smuzhiyun		reg = <0x68>;
160*4882a593Smuzhiyun	};
161*4882a593Smuzhiyun};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun/*
164*4882a593Smuzhiyun * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
165*4882a593Smuzhiyun * board)
166*4882a593Smuzhiyun */
167*4882a593Smuzhiyun&i2c3 {
168*4882a593Smuzhiyun	status = "okay";
169*4882a593Smuzhiyun};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun&ipu1_di1_disp1 {
172*4882a593Smuzhiyun	remote-endpoint = <&lcd_display_in>;
173*4882a593Smuzhiyun};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun&ldb {
176*4882a593Smuzhiyun	status = "okay";
177*4882a593Smuzhiyun};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun&pcie {
180*4882a593Smuzhiyun	pinctrl-names = "default";
181*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_reset_moci>;
182*4882a593Smuzhiyun	/* active-high meaning opposite of regular PERST# active-low polarity */
183*4882a593Smuzhiyun	reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
184*4882a593Smuzhiyun	reset-gpio-active-high;
185*4882a593Smuzhiyun	status = "okay";
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun&pwm1 {
189*4882a593Smuzhiyun	status = "okay";
190*4882a593Smuzhiyun};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun&pwm2 {
193*4882a593Smuzhiyun	status = "okay";
194*4882a593Smuzhiyun};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun&pwm3 {
197*4882a593Smuzhiyun	status = "okay";
198*4882a593Smuzhiyun};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun&pwm4 {
201*4882a593Smuzhiyun	status = "okay";
202*4882a593Smuzhiyun};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun&reg_usb_otg_vbus {
205*4882a593Smuzhiyun	status = "okay";
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&reg_usb_host_vbus {
209*4882a593Smuzhiyun	status = "okay";
210*4882a593Smuzhiyun};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun&sata {
213*4882a593Smuzhiyun	status = "okay";
214*4882a593Smuzhiyun};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun&sound_spdif {
217*4882a593Smuzhiyun	status = "okay";
218*4882a593Smuzhiyun};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun&spdif {
221*4882a593Smuzhiyun	status = "okay";
222*4882a593Smuzhiyun};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun&uart1 {
225*4882a593Smuzhiyun	status = "okay";
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&uart2 {
229*4882a593Smuzhiyun	status = "okay";
230*4882a593Smuzhiyun};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun&uart4 {
233*4882a593Smuzhiyun	status = "okay";
234*4882a593Smuzhiyun};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun&uart5 {
237*4882a593Smuzhiyun	status = "okay";
238*4882a593Smuzhiyun};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun&usbh1 {
241*4882a593Smuzhiyun	vbus-supply = <&reg_usb_host_vbus>;
242*4882a593Smuzhiyun	status = "okay";
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&usbotg {
246*4882a593Smuzhiyun	vbus-supply = <&reg_usb_otg_vbus>;
247*4882a593Smuzhiyun	status = "okay";
248*4882a593Smuzhiyun};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun/* SD1 */
251*4882a593Smuzhiyun&usdhc2 {
252*4882a593Smuzhiyun	pinctrl-names = "default";
253*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
254*4882a593Smuzhiyun	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
255*4882a593Smuzhiyun	status = "okay";
256*4882a593Smuzhiyun};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun&iomuxc {
259*4882a593Smuzhiyun	/* Mux the Apalis GPIOs */
260*4882a593Smuzhiyun	pinctrl-names = "default";
261*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
262*4882a593Smuzhiyun		     &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
263*4882a593Smuzhiyun		     &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6
264*4882a593Smuzhiyun		     &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8
265*4882a593Smuzhiyun		    >;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun	pinctrl_leds_ixora: ledsixoragrp {
268*4882a593Smuzhiyun		fsl,pins = <
269*4882a593Smuzhiyun			MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
270*4882a593Smuzhiyun			MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b0
271*4882a593Smuzhiyun			MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
272*4882a593Smuzhiyun			MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
273*4882a593Smuzhiyun		>;
274*4882a593Smuzhiyun	};
275*4882a593Smuzhiyun};
276