xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2014-2020 Toradex
4*4882a593Smuzhiyun * Copyright 2012 Freescale Semiconductor, Inc.
5*4882a593Smuzhiyun * Copyright 2011 Linaro Ltd.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
11*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
12*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
13*4882a593Smuzhiyun#include "imx6q.dtsi"
14*4882a593Smuzhiyun#include "imx6qdl-apalis.dtsi"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun/ {
17*4882a593Smuzhiyun	model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.1";
18*4882a593Smuzhiyun	compatible = "toradex,apalis_imx6q-ixora-v1.1",
19*4882a593Smuzhiyun		     "toradex,apalis_imx6q-ixora", "toradex,apalis_imx6q",
20*4882a593Smuzhiyun		     "fsl,imx6q";
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	aliases {
23*4882a593Smuzhiyun		i2c0 = &i2c1;
24*4882a593Smuzhiyun		i2c1 = &i2c3;
25*4882a593Smuzhiyun		i2c2 = &i2c2;
26*4882a593Smuzhiyun		rtc0 = &rtc_i2c;
27*4882a593Smuzhiyun		rtc1 = &snvs_rtc;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	chosen {
31*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	gpio-keys {
35*4882a593Smuzhiyun		compatible = "gpio-keys";
36*4882a593Smuzhiyun		pinctrl-names = "default";
37*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_gpio_keys>;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		wakeup {
40*4882a593Smuzhiyun			label = "Wake-Up";
41*4882a593Smuzhiyun			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
42*4882a593Smuzhiyun			linux,code = <KEY_WAKEUP>;
43*4882a593Smuzhiyun			debounce-interval = <10>;
44*4882a593Smuzhiyun			wakeup-source;
45*4882a593Smuzhiyun		};
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	lcd_display: disp0 {
49*4882a593Smuzhiyun		compatible = "fsl,imx-parallel-display";
50*4882a593Smuzhiyun		#address-cells = <1>;
51*4882a593Smuzhiyun		#size-cells = <0>;
52*4882a593Smuzhiyun		interface-pix-fmt = "rgb24";
53*4882a593Smuzhiyun		pinctrl-names = "default";
54*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_ipu1_lcdif>;
55*4882a593Smuzhiyun		status = "okay";
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun		port@0 {
58*4882a593Smuzhiyun			reg = <0>;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun			lcd_display_in: endpoint {
61*4882a593Smuzhiyun				remote-endpoint = <&ipu1_di1_disp1>;
62*4882a593Smuzhiyun			};
63*4882a593Smuzhiyun		};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		port@1 {
66*4882a593Smuzhiyun			reg = <1>;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun			lcd_display_out: endpoint {
69*4882a593Smuzhiyun				remote-endpoint = <&lcd_panel_in>;
70*4882a593Smuzhiyun			};
71*4882a593Smuzhiyun		};
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun	panel: panel {
75*4882a593Smuzhiyun		/*
76*4882a593Smuzhiyun		 * edt,et057090dhu: EDT 5.7" LCD TFT
77*4882a593Smuzhiyun		 * edt,et070080dh6: EDT 7.0" LCD TFT
78*4882a593Smuzhiyun		 */
79*4882a593Smuzhiyun		compatible = "edt,et057090dhu";
80*4882a593Smuzhiyun		backlight = <&backlight>;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		port {
83*4882a593Smuzhiyun			lcd_panel_in: endpoint {
84*4882a593Smuzhiyun				remote-endpoint = <&lcd_display_out>;
85*4882a593Smuzhiyun			};
86*4882a593Smuzhiyun		};
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	leds {
90*4882a593Smuzhiyun		compatible = "gpio-leds";
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		pinctrl-names = "default";
93*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_leds_ixora>;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		led4-green {
96*4882a593Smuzhiyun			label = "LED_4_GREEN";
97*4882a593Smuzhiyun			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
98*4882a593Smuzhiyun		};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun		led4-red {
101*4882a593Smuzhiyun			label = "LED_4_RED";
102*4882a593Smuzhiyun			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
103*4882a593Smuzhiyun		};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun		led5-green {
106*4882a593Smuzhiyun			label = "LED_5_GREEN";
107*4882a593Smuzhiyun			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		led5-red {
111*4882a593Smuzhiyun			label = "LED_5_RED";
112*4882a593Smuzhiyun			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
113*4882a593Smuzhiyun		};
114*4882a593Smuzhiyun	};
115*4882a593Smuzhiyun};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun&backlight {
118*4882a593Smuzhiyun	brightness-levels = <0 127 191 223 239 247 251 255>;
119*4882a593Smuzhiyun	default-brightness-level = <1>;
120*4882a593Smuzhiyun	status = "okay";
121*4882a593Smuzhiyun};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun&can1 {
124*4882a593Smuzhiyun	status = "okay";
125*4882a593Smuzhiyun};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun&can2 {
128*4882a593Smuzhiyun	status = "okay";
129*4882a593Smuzhiyun};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun&hdmi {
132*4882a593Smuzhiyun	status = "okay";
133*4882a593Smuzhiyun};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
136*4882a593Smuzhiyun&i2c1 {
137*4882a593Smuzhiyun	status = "okay";
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	/*
140*4882a593Smuzhiyun	 * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>,
141*4882a593Smuzhiyun	 * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms
142*4882a593Smuzhiyun	 */
143*4882a593Smuzhiyun	touchscreen@4a {
144*4882a593Smuzhiyun		compatible = "atmel,maxtouch";
145*4882a593Smuzhiyun		reg = <0x4a>;
146*4882a593Smuzhiyun		interrupt-parent = <&gpio6>;
147*4882a593Smuzhiyun		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
148*4882a593Smuzhiyun		reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */
149*4882a593Smuzhiyun		status = "disabled";
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun	/* M41T0M6 real time clock on carrier board */
153*4882a593Smuzhiyun	rtc_i2c: rtc@68 {
154*4882a593Smuzhiyun		compatible = "st,m41t0";
155*4882a593Smuzhiyun		reg = <0x68>;
156*4882a593Smuzhiyun	};
157*4882a593Smuzhiyun};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun/*
160*4882a593Smuzhiyun * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
161*4882a593Smuzhiyun * board)
162*4882a593Smuzhiyun */
163*4882a593Smuzhiyun&i2c3 {
164*4882a593Smuzhiyun	status = "okay";
165*4882a593Smuzhiyun};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun&ipu1_di1_disp1 {
168*4882a593Smuzhiyun	remote-endpoint = <&lcd_display_in>;
169*4882a593Smuzhiyun};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun&ldb {
172*4882a593Smuzhiyun	status = "okay";
173*4882a593Smuzhiyun};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun&pcie {
176*4882a593Smuzhiyun	pinctrl-names = "default";
177*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_reset_moci>;
178*4882a593Smuzhiyun	/* active-high meaning opposite of regular PERST# active-low polarity */
179*4882a593Smuzhiyun	reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
180*4882a593Smuzhiyun	reset-gpio-active-high;
181*4882a593Smuzhiyun	status = "okay";
182*4882a593Smuzhiyun};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun&pwm1 {
185*4882a593Smuzhiyun	status = "okay";
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun&pwm2 {
189*4882a593Smuzhiyun	status = "okay";
190*4882a593Smuzhiyun};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun&pwm3 {
193*4882a593Smuzhiyun	status = "okay";
194*4882a593Smuzhiyun};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun&pwm4 {
197*4882a593Smuzhiyun	status = "okay";
198*4882a593Smuzhiyun};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun&reg_usb_otg_vbus {
201*4882a593Smuzhiyun	status = "okay";
202*4882a593Smuzhiyun};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun&reg_usb_host_vbus {
205*4882a593Smuzhiyun	status = "okay";
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&sata {
209*4882a593Smuzhiyun	status = "okay";
210*4882a593Smuzhiyun};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun&sound_spdif {
213*4882a593Smuzhiyun	status = "okay";
214*4882a593Smuzhiyun};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun&spdif {
217*4882a593Smuzhiyun	status = "okay";
218*4882a593Smuzhiyun};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun&uart1 {
221*4882a593Smuzhiyun	status = "okay";
222*4882a593Smuzhiyun};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun&uart2 {
225*4882a593Smuzhiyun	status = "okay";
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&uart4 {
229*4882a593Smuzhiyun	status = "okay";
230*4882a593Smuzhiyun};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun&uart5 {
233*4882a593Smuzhiyun	status = "okay";
234*4882a593Smuzhiyun};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun&usbh1 {
237*4882a593Smuzhiyun	vbus-supply = <&reg_usb_host_vbus>;
238*4882a593Smuzhiyun	status = "okay";
239*4882a593Smuzhiyun};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun&usbotg {
242*4882a593Smuzhiyun	vbus-supply = <&reg_usb_otg_vbus>;
243*4882a593Smuzhiyun	status = "okay";
244*4882a593Smuzhiyun};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun/* MMC1 */
247*4882a593Smuzhiyun&usdhc1 {
248*4882a593Smuzhiyun	pinctrl-names = "default";
249*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>;
250*4882a593Smuzhiyun	cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
251*4882a593Smuzhiyun	bus-width = <4>;
252*4882a593Smuzhiyun	status = "okay";
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&iomuxc {
256*4882a593Smuzhiyun	/*
257*4882a593Smuzhiyun	 * Mux the Apalis GPIOs
258*4882a593Smuzhiyun	 */
259*4882a593Smuzhiyun	pinctrl-names = "default";
260*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
261*4882a593Smuzhiyun		     &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
262*4882a593Smuzhiyun		     &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6
263*4882a593Smuzhiyun		     &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8
264*4882a593Smuzhiyun		    >;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun	pinctrl_leds_ixora: ledsixoragrp {
267*4882a593Smuzhiyun		fsl,pins = <
268*4882a593Smuzhiyun			MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
269*4882a593Smuzhiyun			MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
270*4882a593Smuzhiyun			MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
271*4882a593Smuzhiyun			MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
272*4882a593Smuzhiyun		>;
273*4882a593Smuzhiyun	};
274*4882a593Smuzhiyun};
275