1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2014 Marek Vasut <marex@denx.de> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "imx53.dtsi" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "Aries/DENX M53"; 10*4882a593Smuzhiyun compatible = "aries,imx53-m53", "denx,imx53-m53", "fsl,imx53"; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun memory@70000000 { 13*4882a593Smuzhiyun device_type = "memory"; 14*4882a593Smuzhiyun reg = <0x70000000 0x20000000>, 15*4882a593Smuzhiyun <0xb0000000 0x20000000>; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun regulators { 19*4882a593Smuzhiyun compatible = "simple-bus"; 20*4882a593Smuzhiyun #address-cells = <1>; 21*4882a593Smuzhiyun #size-cells = <0>; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun reg_3p2v: regulator@0 { 24*4882a593Smuzhiyun compatible = "regulator-fixed"; 25*4882a593Smuzhiyun reg = <0>; 26*4882a593Smuzhiyun regulator-name = "3P2V"; 27*4882a593Smuzhiyun regulator-min-microvolt = <3200000>; 28*4882a593Smuzhiyun regulator-max-microvolt = <3200000>; 29*4882a593Smuzhiyun regulator-always-on; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun reg_backlight: regulator@1 { 33*4882a593Smuzhiyun compatible = "regulator-fixed"; 34*4882a593Smuzhiyun reg = <1>; 35*4882a593Smuzhiyun regulator-name = "lcd-supply"; 36*4882a593Smuzhiyun regulator-min-microvolt = <3200000>; 37*4882a593Smuzhiyun regulator-max-microvolt = <3200000>; 38*4882a593Smuzhiyun regulator-always-on; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&i2c2 { 44*4882a593Smuzhiyun pinctrl-names = "default"; 45*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c2>; 46*4882a593Smuzhiyun clock-frequency = <400000>; 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun touchscreen@41 { 50*4882a593Smuzhiyun compatible = "st,stmpe610"; 51*4882a593Smuzhiyun reg = <0x41>; 52*4882a593Smuzhiyun id = <0>; 53*4882a593Smuzhiyun blocks = <0x5>; 54*4882a593Smuzhiyun interrupts = <6 0x0>; 55*4882a593Smuzhiyun interrupt-parent = <&gpio7>; 56*4882a593Smuzhiyun irq-trigger = <0x1>; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun stmpe_touchscreen { 59*4882a593Smuzhiyun compatible = "st,stmpe-ts"; 60*4882a593Smuzhiyun st,sample-time = <4>; 61*4882a593Smuzhiyun st,mod-12b = <1>; 62*4882a593Smuzhiyun st,ref-sel = <0>; 63*4882a593Smuzhiyun st,adc-freq = <1>; 64*4882a593Smuzhiyun st,ave-ctrl = <3>; 65*4882a593Smuzhiyun st,touch-det-delay = <3>; 66*4882a593Smuzhiyun st,settling = <4>; 67*4882a593Smuzhiyun st,fraction-z = <7>; 68*4882a593Smuzhiyun st,i-drive = <1>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun eeprom: eeprom@50 { 73*4882a593Smuzhiyun compatible = "atmel,24c128"; 74*4882a593Smuzhiyun reg = <0x50>; 75*4882a593Smuzhiyun pagesize = <32>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun rtc: rtc@68 { 79*4882a593Smuzhiyun compatible = "st,m41t62"; 80*4882a593Smuzhiyun reg = <0x68>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun}; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun&iomuxc { 85*4882a593Smuzhiyun pinctrl-names = "default"; 86*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hog>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun imx53-m53evk { 89*4882a593Smuzhiyun pinctrl_hog: hoggrp { 90*4882a593Smuzhiyun fsl,pins = < 91*4882a593Smuzhiyun MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 92*4882a593Smuzhiyun MX53_PAD_EIM_EB3__GPIO2_31 0x80000000 93*4882a593Smuzhiyun MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 94*4882a593Smuzhiyun >; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun pinctrl_i2c2: i2c2grp { 98*4882a593Smuzhiyun fsl,pins = < 99*4882a593Smuzhiyun MX53_PAD_EIM_D16__I2C2_SDA 0xc0000000 100*4882a593Smuzhiyun MX53_PAD_EIM_EB2__I2C2_SCL 0xc0000000 101*4882a593Smuzhiyun >; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun pinctrl_nand: nandgrp { 105*4882a593Smuzhiyun fsl,pins = < 106*4882a593Smuzhiyun MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4 107*4882a593Smuzhiyun MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4 108*4882a593Smuzhiyun MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4 109*4882a593Smuzhiyun MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4 110*4882a593Smuzhiyun MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0 111*4882a593Smuzhiyun MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0 112*4882a593Smuzhiyun MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4 113*4882a593Smuzhiyun MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4 114*4882a593Smuzhiyun MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4 115*4882a593Smuzhiyun MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4 116*4882a593Smuzhiyun MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4 117*4882a593Smuzhiyun MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4 118*4882a593Smuzhiyun MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4 119*4882a593Smuzhiyun MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4 120*4882a593Smuzhiyun MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4 121*4882a593Smuzhiyun >; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun}; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun&nfc { 127*4882a593Smuzhiyun pinctrl-names = "default"; 128*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_nand>; 129*4882a593Smuzhiyun nand-bus-width = <8>; 130*4882a593Smuzhiyun nand-ecc-mode = "hw"; 131*4882a593Smuzhiyun status = "okay"; 132*4882a593Smuzhiyun}; 133