xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx53-ard.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2011 Freescale Semiconductor, Inc.
4*4882a593Smuzhiyun * Copyright 2011 Linaro Ltd.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
9*4882a593Smuzhiyun#include "imx53.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Freescale i.MX53 Automotive Reference Design Board";
13*4882a593Smuzhiyun	compatible = "fsl,imx53-ard", "fsl,imx53";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	memory@70000000 {
16*4882a593Smuzhiyun		device_type = "memory";
17*4882a593Smuzhiyun		reg = <0x70000000 0x40000000>;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	eim-cs1@f4000000 {
21*4882a593Smuzhiyun		#address-cells = <1>;
22*4882a593Smuzhiyun		#size-cells = <1>;
23*4882a593Smuzhiyun		compatible = "fsl,eim-bus", "simple-bus";
24*4882a593Smuzhiyun		reg = <0xf4000000 0x3ff0000>;
25*4882a593Smuzhiyun		ranges;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		lan9220@f4000000 {
28*4882a593Smuzhiyun			compatible = "smsc,lan9220", "smsc,lan9115";
29*4882a593Smuzhiyun			reg = <0xf4000000 0x2000000>;
30*4882a593Smuzhiyun			phy-mode = "mii";
31*4882a593Smuzhiyun			interrupt-parent = <&gpio2>;
32*4882a593Smuzhiyun			interrupts = <31 0x8>;
33*4882a593Smuzhiyun			reg-io-width = <4>;
34*4882a593Smuzhiyun			/*
35*4882a593Smuzhiyun			 * VDD33A and VDDVARIO of LAN9220 are supplied by
36*4882a593Smuzhiyun			 * SW4_3V3 of LTC3589.  Before the regulator driver
37*4882a593Smuzhiyun			 * for this PMIC is available, we use a fixed dummy
38*4882a593Smuzhiyun			 * 3V3 regulator to get LAN9220 driver probing work.
39*4882a593Smuzhiyun			 */
40*4882a593Smuzhiyun			vdd33a-supply = <&reg_3p3v>;
41*4882a593Smuzhiyun			vddvario-supply = <&reg_3p3v>;
42*4882a593Smuzhiyun			smsc,irq-push-pull;
43*4882a593Smuzhiyun		};
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	regulators {
47*4882a593Smuzhiyun		compatible = "simple-bus";
48*4882a593Smuzhiyun		#address-cells = <1>;
49*4882a593Smuzhiyun		#size-cells = <0>;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun		reg_3p3v: regulator@0 {
52*4882a593Smuzhiyun			compatible = "regulator-fixed";
53*4882a593Smuzhiyun			reg = <0>;
54*4882a593Smuzhiyun			regulator-name = "3P3V";
55*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
56*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
57*4882a593Smuzhiyun			regulator-always-on;
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	gpio-keys {
62*4882a593Smuzhiyun		compatible = "gpio-keys";
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun		home {
65*4882a593Smuzhiyun			label = "Home";
66*4882a593Smuzhiyun			gpios = <&gpio5 10 0>;
67*4882a593Smuzhiyun			linux,code = <KEY_HOME>;
68*4882a593Smuzhiyun			wakeup-source;
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		back {
72*4882a593Smuzhiyun			label = "Back";
73*4882a593Smuzhiyun			gpios = <&gpio5 11 0>;
74*4882a593Smuzhiyun			linux,code = <KEY_BACK>;
75*4882a593Smuzhiyun			wakeup-source;
76*4882a593Smuzhiyun		};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		program {
79*4882a593Smuzhiyun			label = "Program";
80*4882a593Smuzhiyun			gpios = <&gpio5 12 0>;
81*4882a593Smuzhiyun			linux,code = <KEY_PROGRAM >;
82*4882a593Smuzhiyun			wakeup-source;
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		volume-up {
86*4882a593Smuzhiyun			label = "Volume Up";
87*4882a593Smuzhiyun			gpios = <&gpio5 13 0>;
88*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
89*4882a593Smuzhiyun		};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun		volume-down {
92*4882a593Smuzhiyun			label = "Volume Down";
93*4882a593Smuzhiyun			gpios = <&gpio4 0 0>;
94*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
95*4882a593Smuzhiyun		};
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun&esdhc1 {
100*4882a593Smuzhiyun	pinctrl-names = "default";
101*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_esdhc1>;
102*4882a593Smuzhiyun	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
103*4882a593Smuzhiyun	wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
104*4882a593Smuzhiyun	status = "okay";
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun&iomuxc {
108*4882a593Smuzhiyun	pinctrl-names = "default";
109*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_hog>;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	imx53-ard {
112*4882a593Smuzhiyun		pinctrl_hog: hoggrp {
113*4882a593Smuzhiyun			fsl,pins = <
114*4882a593Smuzhiyun				MX53_PAD_GPIO_1__GPIO1_1             0x80000000
115*4882a593Smuzhiyun				MX53_PAD_GPIO_9__GPIO1_9             0x80000000
116*4882a593Smuzhiyun				MX53_PAD_EIM_EB3__GPIO2_31           0x80000000
117*4882a593Smuzhiyun				MX53_PAD_GPIO_10__GPIO4_0            0x80000000
118*4882a593Smuzhiyun				MX53_PAD_DISP0_DAT16__GPIO5_10	     0x80000000
119*4882a593Smuzhiyun				MX53_PAD_DISP0_DAT17__GPIO5_11       0x80000000
120*4882a593Smuzhiyun				MX53_PAD_DISP0_DAT18__GPIO5_12       0x80000000
121*4882a593Smuzhiyun				MX53_PAD_DISP0_DAT19__GPIO5_13       0x80000000
122*4882a593Smuzhiyun				MX53_PAD_EIM_D16__EMI_WEIM_D_16      0x80000000
123*4882a593Smuzhiyun				MX53_PAD_EIM_D17__EMI_WEIM_D_17      0x80000000
124*4882a593Smuzhiyun				MX53_PAD_EIM_D18__EMI_WEIM_D_18      0x80000000
125*4882a593Smuzhiyun				MX53_PAD_EIM_D19__EMI_WEIM_D_19      0x80000000
126*4882a593Smuzhiyun				MX53_PAD_EIM_D20__EMI_WEIM_D_20      0x80000000
127*4882a593Smuzhiyun				MX53_PAD_EIM_D21__EMI_WEIM_D_21      0x80000000
128*4882a593Smuzhiyun				MX53_PAD_EIM_D22__EMI_WEIM_D_22      0x80000000
129*4882a593Smuzhiyun				MX53_PAD_EIM_D23__EMI_WEIM_D_23      0x80000000
130*4882a593Smuzhiyun				MX53_PAD_EIM_D24__EMI_WEIM_D_24      0x80000000
131*4882a593Smuzhiyun				MX53_PAD_EIM_D25__EMI_WEIM_D_25      0x80000000
132*4882a593Smuzhiyun				MX53_PAD_EIM_D26__EMI_WEIM_D_26      0x80000000
133*4882a593Smuzhiyun				MX53_PAD_EIM_D27__EMI_WEIM_D_27      0x80000000
134*4882a593Smuzhiyun				MX53_PAD_EIM_D28__EMI_WEIM_D_28      0x80000000
135*4882a593Smuzhiyun				MX53_PAD_EIM_D29__EMI_WEIM_D_29      0x80000000
136*4882a593Smuzhiyun				MX53_PAD_EIM_D30__EMI_WEIM_D_30      0x80000000
137*4882a593Smuzhiyun				MX53_PAD_EIM_D31__EMI_WEIM_D_31      0x80000000
138*4882a593Smuzhiyun				MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000
139*4882a593Smuzhiyun				MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000
140*4882a593Smuzhiyun				MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000
141*4882a593Smuzhiyun				MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000
142*4882a593Smuzhiyun				MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000
143*4882a593Smuzhiyun				MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000
144*4882a593Smuzhiyun				MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000
145*4882a593Smuzhiyun				MX53_PAD_EIM_OE__EMI_WEIM_OE	     0x80000000
146*4882a593Smuzhiyun				MX53_PAD_EIM_RW__EMI_WEIM_RW	     0x80000000
147*4882a593Smuzhiyun				MX53_PAD_EIM_CS1__EMI_WEIM_CS_1	     0x80000000
148*4882a593Smuzhiyun			>;
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun		pinctrl_esdhc1: esdhc1grp {
152*4882a593Smuzhiyun			fsl,pins = <
153*4882a593Smuzhiyun				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5
154*4882a593Smuzhiyun				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5
155*4882a593Smuzhiyun				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5
156*4882a593Smuzhiyun				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5
157*4882a593Smuzhiyun				MX53_PAD_PATA_DATA8__ESDHC1_DAT4	0x1d5
158*4882a593Smuzhiyun				MX53_PAD_PATA_DATA9__ESDHC1_DAT5	0x1d5
159*4882a593Smuzhiyun				MX53_PAD_PATA_DATA10__ESDHC1_DAT6	0x1d5
160*4882a593Smuzhiyun				MX53_PAD_PATA_DATA11__ESDHC1_DAT7	0x1d5
161*4882a593Smuzhiyun				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5
162*4882a593Smuzhiyun				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5
163*4882a593Smuzhiyun			>;
164*4882a593Smuzhiyun		};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun		pinctrl_uart1: uart1grp {
167*4882a593Smuzhiyun			fsl,pins = <
168*4882a593Smuzhiyun				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
169*4882a593Smuzhiyun				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
170*4882a593Smuzhiyun			>;
171*4882a593Smuzhiyun		};
172*4882a593Smuzhiyun	};
173*4882a593Smuzhiyun};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun&uart1 {
176*4882a593Smuzhiyun	pinctrl-names = "default";
177*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_uart1>;
178*4882a593Smuzhiyun	status = "okay";
179*4882a593Smuzhiyun};
180