xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx50-evk.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun//
3*4882a593Smuzhiyun// Copyright 2013 Greg Ungerer <gerg@uclinux.org>
4*4882a593Smuzhiyun// Copyright 2011 Freescale Semiconductor, Inc.
5*4882a593Smuzhiyun// Copyright 2011 Linaro Ltd.
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "imx50.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Freescale i.MX50 Evaluation Kit";
12*4882a593Smuzhiyun	compatible = "fsl,imx50-evk", "fsl,imx50";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	memory@70000000 {
15*4882a593Smuzhiyun		device_type = "memory";
16*4882a593Smuzhiyun		reg = <0x70000000 0x80000000>;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun&cspi {
21*4882a593Smuzhiyun	pinctrl-names = "default";
22*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_cspi>;
23*4882a593Smuzhiyun	cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>, <&gpio4 13 GPIO_ACTIVE_LOW>;
24*4882a593Smuzhiyun	status = "okay";
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	flash: m25p32@1 {
27*4882a593Smuzhiyun		#address-cells = <1>;
28*4882a593Smuzhiyun		#size-cells = <1>;
29*4882a593Smuzhiyun		compatible = "m25p32", "jedec,spi-nor";
30*4882a593Smuzhiyun		spi-max-frequency = <25000000>;
31*4882a593Smuzhiyun		reg = <1>;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun		partition@0 {
34*4882a593Smuzhiyun			label = "bootloader";
35*4882a593Smuzhiyun			reg = <0x0 0x100000>;
36*4882a593Smuzhiyun			read-only;
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		partition@100000 {
40*4882a593Smuzhiyun			label = "kernel";
41*4882a593Smuzhiyun			reg = <0x100000 0x300000>;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun&fec {
47*4882a593Smuzhiyun	pinctrl-names = "default";
48*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_fec>;
49*4882a593Smuzhiyun	phy-mode = "rmii";
50*4882a593Smuzhiyun	phy-reset-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
51*4882a593Smuzhiyun	status = "okay";
52*4882a593Smuzhiyun};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun&iomuxc {
55*4882a593Smuzhiyun	imx50-evk {
56*4882a593Smuzhiyun		pinctrl_cspi: cspigrp {
57*4882a593Smuzhiyun			fsl,pins = <
58*4882a593Smuzhiyun				MX50_PAD_CSPI_SCLK__CSPI_SCLK		0x00
59*4882a593Smuzhiyun				MX50_PAD_CSPI_MISO__CSPI_MISO		0x00
60*4882a593Smuzhiyun				MX50_PAD_CSPI_MOSI__CSPI_MOSI		0x00
61*4882a593Smuzhiyun				MX50_PAD_CSPI_SS0__GPIO4_11		0xc4
62*4882a593Smuzhiyun				MX50_PAD_ECSPI1_MOSI__GPIO4_13		0x84
63*4882a593Smuzhiyun			>;
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		pinctrl_fec: fecgrp {
67*4882a593Smuzhiyun			fsl,pins = <
68*4882a593Smuzhiyun				MX50_PAD_SSI_RXFS__FEC_MDC		0x80
69*4882a593Smuzhiyun				MX50_PAD_SSI_RXC__FEC_MDIO		0x80
70*4882a593Smuzhiyun				MX50_PAD_DISP_D0__FEC_TX_CLK		0x80
71*4882a593Smuzhiyun				MX50_PAD_DISP_D1__FEC_RX_ERR		0x80
72*4882a593Smuzhiyun				MX50_PAD_DISP_D2__FEC_RX_DV		0x80
73*4882a593Smuzhiyun				MX50_PAD_DISP_D3__FEC_RDATA_1		0x80
74*4882a593Smuzhiyun				MX50_PAD_DISP_D4__FEC_RDATA_0		0x80
75*4882a593Smuzhiyun				MX50_PAD_DISP_D5__FEC_TX_EN		0x80
76*4882a593Smuzhiyun				MX50_PAD_DISP_D6__FEC_TDATA_1		0x80
77*4882a593Smuzhiyun				MX50_PAD_DISP_D7__FEC_TDATA_0		0x80
78*4882a593Smuzhiyun			>;
79*4882a593Smuzhiyun		};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		pinctrl_uart1: uart1grp {
82*4882a593Smuzhiyun			fsl,pins = <
83*4882a593Smuzhiyun				MX50_PAD_UART1_TXD__UART1_TXD_MUX	0x1e4
84*4882a593Smuzhiyun				MX50_PAD_UART1_RXD__UART1_RXD_MUX	0x1e4
85*4882a593Smuzhiyun				MX50_PAD_UART1_RTS__UART1_RTS		0x1e4
86*4882a593Smuzhiyun				MX50_PAD_UART1_CTS__UART1_CTS		0x1e4
87*4882a593Smuzhiyun			>;
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun&uart1 {
93*4882a593Smuzhiyun	pinctrl-names = "default";
94*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_uart1>;
95*4882a593Smuzhiyun	status = "okay";
96*4882a593Smuzhiyun};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun&usbh1 {
99*4882a593Smuzhiyun	status = "okay";
100*4882a593Smuzhiyun};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun&usbotg {
103*4882a593Smuzhiyun	status = "okay";
104*4882a593Smuzhiyun};
105