1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Copyright 2012 Steffen Trumtrar, Pengutronix 4*4882a593Smuzhiyun// 5*4882a593Smuzhiyun// based on imx27.dtsi 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "imx35-pinfunc.h" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun #address-cells = <1>; 11*4882a593Smuzhiyun #size-cells = <1>; 12*4882a593Smuzhiyun /* 13*4882a593Smuzhiyun * The decompressor and also some bootloaders rely on a 14*4882a593Smuzhiyun * pre-existing /chosen node to be available to insert the 15*4882a593Smuzhiyun * command line and merge other ATAGS info. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun chosen {}; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun aliases { 20*4882a593Smuzhiyun ethernet0 = &fec; 21*4882a593Smuzhiyun gpio0 = &gpio1; 22*4882a593Smuzhiyun gpio1 = &gpio2; 23*4882a593Smuzhiyun gpio2 = &gpio3; 24*4882a593Smuzhiyun i2c0 = &i2c1; 25*4882a593Smuzhiyun i2c1 = &i2c2; 26*4882a593Smuzhiyun i2c2 = &i2c3; 27*4882a593Smuzhiyun mmc0 = &esdhc1; 28*4882a593Smuzhiyun mmc1 = &esdhc2; 29*4882a593Smuzhiyun mmc2 = &esdhc3; 30*4882a593Smuzhiyun serial0 = &uart1; 31*4882a593Smuzhiyun serial1 = &uart2; 32*4882a593Smuzhiyun serial2 = &uart3; 33*4882a593Smuzhiyun spi0 = &spi1; 34*4882a593Smuzhiyun spi1 = &spi2; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun cpus { 38*4882a593Smuzhiyun #address-cells = <1>; 39*4882a593Smuzhiyun #size-cells = <0>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun cpu@0 { 42*4882a593Smuzhiyun compatible = "arm,arm1136jf-s"; 43*4882a593Smuzhiyun device_type = "cpu"; 44*4882a593Smuzhiyun reg = <0>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun avic: avic-interrupt-controller@68000000 { 49*4882a593Smuzhiyun compatible = "fsl,imx35-avic", "fsl,avic"; 50*4882a593Smuzhiyun interrupt-controller; 51*4882a593Smuzhiyun #interrupt-cells = <1>; 52*4882a593Smuzhiyun reg = <0x68000000 0x10000000>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun soc { 56*4882a593Smuzhiyun #address-cells = <1>; 57*4882a593Smuzhiyun #size-cells = <1>; 58*4882a593Smuzhiyun compatible = "simple-bus"; 59*4882a593Smuzhiyun interrupt-parent = <&avic>; 60*4882a593Smuzhiyun ranges; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun L2: cache-controller@30000000 { 63*4882a593Smuzhiyun compatible = "arm,l210-cache"; 64*4882a593Smuzhiyun reg = <0x30000000 0x1000>; 65*4882a593Smuzhiyun cache-unified; 66*4882a593Smuzhiyun cache-level = <2>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun aips1: bus@43f00000 { 70*4882a593Smuzhiyun compatible = "fsl,aips", "simple-bus"; 71*4882a593Smuzhiyun #address-cells = <1>; 72*4882a593Smuzhiyun #size-cells = <1>; 73*4882a593Smuzhiyun reg = <0x43f00000 0x100000>; 74*4882a593Smuzhiyun ranges; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun i2c1: i2c@43f80000 { 77*4882a593Smuzhiyun #address-cells = <1>; 78*4882a593Smuzhiyun #size-cells = <0>; 79*4882a593Smuzhiyun compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; 80*4882a593Smuzhiyun reg = <0x43f80000 0x4000>; 81*4882a593Smuzhiyun clocks = <&clks 51>; 82*4882a593Smuzhiyun clock-names = "ipg_per"; 83*4882a593Smuzhiyun interrupts = <10>; 84*4882a593Smuzhiyun status = "disabled"; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun i2c3: i2c@43f84000 { 88*4882a593Smuzhiyun #address-cells = <1>; 89*4882a593Smuzhiyun #size-cells = <0>; 90*4882a593Smuzhiyun compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; 91*4882a593Smuzhiyun reg = <0x43f84000 0x4000>; 92*4882a593Smuzhiyun clocks = <&clks 53>; 93*4882a593Smuzhiyun clock-names = "ipg_per"; 94*4882a593Smuzhiyun interrupts = <3>; 95*4882a593Smuzhiyun status = "disabled"; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun uart1: serial@43f90000 { 99*4882a593Smuzhiyun compatible = "fsl,imx35-uart", "fsl,imx21-uart"; 100*4882a593Smuzhiyun reg = <0x43f90000 0x4000>; 101*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 70>; 102*4882a593Smuzhiyun clock-names = "ipg", "per"; 103*4882a593Smuzhiyun interrupts = <45>; 104*4882a593Smuzhiyun status = "disabled"; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun uart2: serial@43f94000 { 108*4882a593Smuzhiyun compatible = "fsl,imx35-uart", "fsl,imx21-uart"; 109*4882a593Smuzhiyun reg = <0x43f94000 0x4000>; 110*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 71>; 111*4882a593Smuzhiyun clock-names = "ipg", "per"; 112*4882a593Smuzhiyun interrupts = <32>; 113*4882a593Smuzhiyun status = "disabled"; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun i2c2: i2c@43f98000 { 117*4882a593Smuzhiyun #address-cells = <1>; 118*4882a593Smuzhiyun #size-cells = <0>; 119*4882a593Smuzhiyun compatible = "fsl,imx35-i2c", "fsl,imx1-i2c"; 120*4882a593Smuzhiyun reg = <0x43f98000 0x4000>; 121*4882a593Smuzhiyun clocks = <&clks 52>; 122*4882a593Smuzhiyun clock-names = "ipg_per"; 123*4882a593Smuzhiyun interrupts = <4>; 124*4882a593Smuzhiyun status = "disabled"; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun ssi1: ssi@43fa0000 { 128*4882a593Smuzhiyun #sound-dai-cells = <0>; 129*4882a593Smuzhiyun compatible = "fsl,imx35-ssi", "fsl,imx21-ssi"; 130*4882a593Smuzhiyun reg = <0x43fa0000 0x4000>; 131*4882a593Smuzhiyun interrupts = <11>; 132*4882a593Smuzhiyun clocks = <&clks 68>; 133*4882a593Smuzhiyun dmas = <&sdma 28 0 0>, 134*4882a593Smuzhiyun <&sdma 29 0 0>; 135*4882a593Smuzhiyun dma-names = "rx", "tx"; 136*4882a593Smuzhiyun fsl,fifo-depth = <15>; 137*4882a593Smuzhiyun status = "disabled"; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun spi1: spi@43fa4000 { 141*4882a593Smuzhiyun #address-cells = <1>; 142*4882a593Smuzhiyun #size-cells = <0>; 143*4882a593Smuzhiyun compatible = "fsl,imx35-cspi"; 144*4882a593Smuzhiyun reg = <0x43fa4000 0x4000>; 145*4882a593Smuzhiyun clocks = <&clks 35 &clks 35>; 146*4882a593Smuzhiyun clock-names = "ipg", "per"; 147*4882a593Smuzhiyun interrupts = <14>; 148*4882a593Smuzhiyun status = "disabled"; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun kpp: kpp@43fa8000 { 152*4882a593Smuzhiyun compatible = "fsl,imx35-kpp", "fsl,imx21-kpp"; 153*4882a593Smuzhiyun reg = <0x43fa8000 0x4000>; 154*4882a593Smuzhiyun interrupts = <24>; 155*4882a593Smuzhiyun clocks = <&clks 56>; 156*4882a593Smuzhiyun status = "disabled"; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun iomuxc: iomuxc@43fac000 { 160*4882a593Smuzhiyun compatible = "fsl,imx35-iomuxc"; 161*4882a593Smuzhiyun reg = <0x43fac000 0x4000>; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun spba: spba-bus@50000000 { 166*4882a593Smuzhiyun compatible = "fsl,spba-bus", "simple-bus"; 167*4882a593Smuzhiyun #address-cells = <1>; 168*4882a593Smuzhiyun #size-cells = <1>; 169*4882a593Smuzhiyun reg = <0x50000000 0x100000>; 170*4882a593Smuzhiyun ranges; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun uart3: serial@5000c000 { 173*4882a593Smuzhiyun compatible = "fsl,imx35-uart", "fsl,imx21-uart"; 174*4882a593Smuzhiyun reg = <0x5000c000 0x4000>; 175*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 72>; 176*4882a593Smuzhiyun clock-names = "ipg", "per"; 177*4882a593Smuzhiyun interrupts = <18>; 178*4882a593Smuzhiyun status = "disabled"; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun spi2: spi@50010000 { 182*4882a593Smuzhiyun #address-cells = <1>; 183*4882a593Smuzhiyun #size-cells = <0>; 184*4882a593Smuzhiyun compatible = "fsl,imx35-cspi"; 185*4882a593Smuzhiyun reg = <0x50010000 0x4000>; 186*4882a593Smuzhiyun interrupts = <13>; 187*4882a593Smuzhiyun clocks = <&clks 36 &clks 36>; 188*4882a593Smuzhiyun clock-names = "ipg", "per"; 189*4882a593Smuzhiyun status = "disabled"; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun fec: fec@50038000 { 193*4882a593Smuzhiyun compatible = "fsl,imx35-fec", "fsl,imx27-fec"; 194*4882a593Smuzhiyun reg = <0x50038000 0x4000>; 195*4882a593Smuzhiyun clocks = <&clks 46>, <&clks 8>; 196*4882a593Smuzhiyun clock-names = "ipg", "ahb"; 197*4882a593Smuzhiyun interrupts = <57>; 198*4882a593Smuzhiyun status = "disabled"; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun aips2: bus@53f00000 { 203*4882a593Smuzhiyun compatible = "fsl,aips", "simple-bus"; 204*4882a593Smuzhiyun #address-cells = <1>; 205*4882a593Smuzhiyun #size-cells = <1>; 206*4882a593Smuzhiyun reg = <0x53f00000 0x100000>; 207*4882a593Smuzhiyun ranges; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun clks: ccm@53f80000 { 210*4882a593Smuzhiyun compatible = "fsl,imx35-ccm"; 211*4882a593Smuzhiyun reg = <0x53f80000 0x4000>; 212*4882a593Smuzhiyun interrupts = <31>; 213*4882a593Smuzhiyun #clock-cells = <1>; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun gpt: timer@53f90000 { 217*4882a593Smuzhiyun compatible = "fsl,imx35-gpt", "fsl,imx31-gpt"; 218*4882a593Smuzhiyun reg = <0x53f90000 0x4000>; 219*4882a593Smuzhiyun interrupts = <29>; 220*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 50>; 221*4882a593Smuzhiyun clock-names = "ipg", "per"; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun gpio3: gpio@53fa4000 { 225*4882a593Smuzhiyun compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; 226*4882a593Smuzhiyun reg = <0x53fa4000 0x4000>; 227*4882a593Smuzhiyun interrupts = <56>; 228*4882a593Smuzhiyun gpio-controller; 229*4882a593Smuzhiyun #gpio-cells = <2>; 230*4882a593Smuzhiyun interrupt-controller; 231*4882a593Smuzhiyun #interrupt-cells = <2>; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun esdhc1: mmc@53fb4000 { 235*4882a593Smuzhiyun compatible = "fsl,imx35-esdhc"; 236*4882a593Smuzhiyun reg = <0x53fb4000 0x4000>; 237*4882a593Smuzhiyun interrupts = <7>; 238*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 8>, <&clks 43>; 239*4882a593Smuzhiyun clock-names = "ipg", "ahb", "per"; 240*4882a593Smuzhiyun status = "disabled"; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun esdhc2: mmc@53fb8000 { 244*4882a593Smuzhiyun compatible = "fsl,imx35-esdhc"; 245*4882a593Smuzhiyun reg = <0x53fb8000 0x4000>; 246*4882a593Smuzhiyun interrupts = <8>; 247*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 8>, <&clks 44>; 248*4882a593Smuzhiyun clock-names = "ipg", "ahb", "per"; 249*4882a593Smuzhiyun status = "disabled"; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun esdhc3: mmc@53fbc000 { 253*4882a593Smuzhiyun compatible = "fsl,imx35-esdhc"; 254*4882a593Smuzhiyun reg = <0x53fbc000 0x4000>; 255*4882a593Smuzhiyun interrupts = <9>; 256*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 8>, <&clks 45>; 257*4882a593Smuzhiyun clock-names = "ipg", "ahb", "per"; 258*4882a593Smuzhiyun status = "disabled"; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun audmux: audmux@53fc4000 { 262*4882a593Smuzhiyun compatible = "fsl,imx35-audmux", "fsl,imx31-audmux"; 263*4882a593Smuzhiyun reg = <0x53fc4000 0x4000>; 264*4882a593Smuzhiyun status = "disabled"; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun gpio1: gpio@53fcc000 { 268*4882a593Smuzhiyun compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; 269*4882a593Smuzhiyun reg = <0x53fcc000 0x4000>; 270*4882a593Smuzhiyun interrupts = <52>; 271*4882a593Smuzhiyun gpio-controller; 272*4882a593Smuzhiyun #gpio-cells = <2>; 273*4882a593Smuzhiyun interrupt-controller; 274*4882a593Smuzhiyun #interrupt-cells = <2>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun gpio2: gpio@53fd0000 { 278*4882a593Smuzhiyun compatible = "fsl,imx35-gpio", "fsl,imx31-gpio"; 279*4882a593Smuzhiyun reg = <0x53fd0000 0x4000>; 280*4882a593Smuzhiyun interrupts = <51>; 281*4882a593Smuzhiyun gpio-controller; 282*4882a593Smuzhiyun #gpio-cells = <2>; 283*4882a593Smuzhiyun interrupt-controller; 284*4882a593Smuzhiyun #interrupt-cells = <2>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun sdma: sdma@53fd4000 { 288*4882a593Smuzhiyun compatible = "fsl,imx35-sdma"; 289*4882a593Smuzhiyun reg = <0x53fd4000 0x4000>; 290*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 65>; 291*4882a593Smuzhiyun clock-names = "ipg", "ahb"; 292*4882a593Smuzhiyun #dma-cells = <3>; 293*4882a593Smuzhiyun interrupts = <34>; 294*4882a593Smuzhiyun fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin"; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun wdog: wdog@53fdc000 { 298*4882a593Smuzhiyun compatible = "fsl,imx35-wdt", "fsl,imx21-wdt"; 299*4882a593Smuzhiyun reg = <0x53fdc000 0x4000>; 300*4882a593Smuzhiyun clocks = <&clks 74>; 301*4882a593Smuzhiyun clock-names = ""; 302*4882a593Smuzhiyun interrupts = <55>; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun can1: can@53fe4000 { 306*4882a593Smuzhiyun compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan"; 307*4882a593Smuzhiyun reg = <0x53fe4000 0x1000>; 308*4882a593Smuzhiyun clocks = <&clks 33>, <&clks 33>; 309*4882a593Smuzhiyun clock-names = "ipg", "per"; 310*4882a593Smuzhiyun interrupts = <43>; 311*4882a593Smuzhiyun status = "disabled"; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun can2: can@53fe8000 { 315*4882a593Smuzhiyun compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan"; 316*4882a593Smuzhiyun reg = <0x53fe8000 0x1000>; 317*4882a593Smuzhiyun clocks = <&clks 34>, <&clks 34>; 318*4882a593Smuzhiyun clock-names = "ipg", "per"; 319*4882a593Smuzhiyun interrupts = <44>; 320*4882a593Smuzhiyun status = "disabled"; 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun efuse@53ff0000 { 324*4882a593Smuzhiyun compatible = "fsl,imx35-iim"; 325*4882a593Smuzhiyun reg = <0x53ff0000 0x4000>; 326*4882a593Smuzhiyun interrupts = <19>; 327*4882a593Smuzhiyun clocks = <&clks 80>; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun usbotg: usb@53ff4000 { 331*4882a593Smuzhiyun compatible = "fsl,imx35-usb", "fsl,imx27-usb"; 332*4882a593Smuzhiyun reg = <0x53ff4000 0x0200>; 333*4882a593Smuzhiyun interrupts = <37>; 334*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 73>, <&clks 28>; 335*4882a593Smuzhiyun clock-names = "ipg", "ahb", "per"; 336*4882a593Smuzhiyun fsl,usbmisc = <&usbmisc 0>; 337*4882a593Smuzhiyun fsl,usbphy = <&usbphy0>; 338*4882a593Smuzhiyun status = "disabled"; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun usbhost1: usb@53ff4400 { 342*4882a593Smuzhiyun compatible = "fsl,imx35-usb", "fsl,imx27-usb"; 343*4882a593Smuzhiyun reg = <0x53ff4400 0x0200>; 344*4882a593Smuzhiyun interrupts = <35>; 345*4882a593Smuzhiyun clocks = <&clks 9>, <&clks 73>, <&clks 28>; 346*4882a593Smuzhiyun clock-names = "ipg", "ahb", "per"; 347*4882a593Smuzhiyun fsl,usbmisc = <&usbmisc 1>; 348*4882a593Smuzhiyun fsl,usbphy = <&usbphy1>; 349*4882a593Smuzhiyun dr_mode = "host"; 350*4882a593Smuzhiyun status = "disabled"; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun usbmisc: usbmisc@53ff4600 { 354*4882a593Smuzhiyun #index-cells = <1>; 355*4882a593Smuzhiyun compatible = "fsl,imx35-usbmisc"; 356*4882a593Smuzhiyun reg = <0x53ff4600 0x00f>; 357*4882a593Smuzhiyun }; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun emi@80000000 { /* External Memory Interface */ 361*4882a593Smuzhiyun compatible = "fsl,emi", "simple-bus"; 362*4882a593Smuzhiyun #address-cells = <1>; 363*4882a593Smuzhiyun #size-cells = <1>; 364*4882a593Smuzhiyun reg = <0x80000000 0x40000000>; 365*4882a593Smuzhiyun ranges; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun nfc: nand@bb000000 { 368*4882a593Smuzhiyun #address-cells = <1>; 369*4882a593Smuzhiyun #size-cells = <1>; 370*4882a593Smuzhiyun compatible = "fsl,imx35-nand", "fsl,imx25-nand"; 371*4882a593Smuzhiyun reg = <0xbb000000 0x2000>; 372*4882a593Smuzhiyun clocks = <&clks 29>; 373*4882a593Smuzhiyun clock-names = ""; 374*4882a593Smuzhiyun interrupts = <33>; 375*4882a593Smuzhiyun status = "disabled"; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun weim: weim@b8002000 { 379*4882a593Smuzhiyun #address-cells = <2>; 380*4882a593Smuzhiyun #size-cells = <1>; 381*4882a593Smuzhiyun clocks = <&clks 0>; 382*4882a593Smuzhiyun compatible = "fsl,imx35-weim", "fsl,imx27-weim"; 383*4882a593Smuzhiyun reg = <0xb8002000 0x1000>; 384*4882a593Smuzhiyun ranges = < 385*4882a593Smuzhiyun 0 0 0xa0000000 0x8000000 386*4882a593Smuzhiyun 1 0 0xa8000000 0x8000000 387*4882a593Smuzhiyun 2 0 0xb0000000 0x2000000 388*4882a593Smuzhiyun 3 0 0xb2000000 0x2000000 389*4882a593Smuzhiyun 4 0 0xb4000000 0x2000000 390*4882a593Smuzhiyun 5 0 0xb6000000 0x2000000 391*4882a593Smuzhiyun >; 392*4882a593Smuzhiyun status = "disabled"; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun }; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun usbphy { 398*4882a593Smuzhiyun compatible = "simple-bus"; 399*4882a593Smuzhiyun #address-cells = <1>; 400*4882a593Smuzhiyun #size-cells = <0>; 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun usbphy0: usb-phy@0 { 403*4882a593Smuzhiyun reg = <0>; 404*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 405*4882a593Smuzhiyun #phy-cells = <0>; 406*4882a593Smuzhiyun }; 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun usbphy1: usb-phy@1 { 409*4882a593Smuzhiyun reg = <1>; 410*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 411*4882a593Smuzhiyun #phy-cells = <0>; 412*4882a593Smuzhiyun }; 413*4882a593Smuzhiyun }; 414*4882a593Smuzhiyun}; 415