1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 4*4882a593Smuzhiyun// Copyright 2014 Freescale Semiconductor, Inc. 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include "imx35.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "Freescale i.MX35 Product Development Kit"; 11*4882a593Smuzhiyun compatible = "fsl,imx35-pdk", "fsl,imx35"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun memory@80000000 { 14*4882a593Smuzhiyun device_type = "memory"; 15*4882a593Smuzhiyun reg = <0x80000000 0x8000000>, 16*4882a593Smuzhiyun <0x90000000 0x8000000>; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun}; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun&esdhc1 { 21*4882a593Smuzhiyun pinctrl-names = "default"; 22*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_esdhc1>; 23*4882a593Smuzhiyun status = "okay"; 24*4882a593Smuzhiyun}; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun&iomuxc { 27*4882a593Smuzhiyun imx35-pdk { 28*4882a593Smuzhiyun pinctrl_esdhc1: esdhc1grp { 29*4882a593Smuzhiyun fsl,pins = < 30*4882a593Smuzhiyun MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 31*4882a593Smuzhiyun MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 32*4882a593Smuzhiyun MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 33*4882a593Smuzhiyun MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 34*4882a593Smuzhiyun MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 35*4882a593Smuzhiyun MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 36*4882a593Smuzhiyun >; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun pinctrl_uart1: uart1grp { 40*4882a593Smuzhiyun fsl,pins = < 41*4882a593Smuzhiyun MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 42*4882a593Smuzhiyun MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 43*4882a593Smuzhiyun MX35_PAD_CTS1__UART1_CTS 0x1c5 44*4882a593Smuzhiyun MX35_PAD_RTS1__UART1_RTS 0x1c5 45*4882a593Smuzhiyun >; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&nfc { 51*4882a593Smuzhiyun nand-bus-width = <16>; 52*4882a593Smuzhiyun nand-ecc-mode = "hw"; 53*4882a593Smuzhiyun nand-on-flash-bbt; 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&uart1 { 58*4882a593Smuzhiyun pinctrl-names = "default"; 59*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart1>; 60*4882a593Smuzhiyun uart-has-rtscts; 61*4882a593Smuzhiyun status = "okay"; 62*4882a593Smuzhiyun}; 63