xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx31-lite.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun//
3*4882a593Smuzhiyun// Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun/dts-v1/;
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "imx31.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "LogicPD i.MX31 Lite";
14*4882a593Smuzhiyun	compatible = "logicpd,imx31-lite", "fsl,imx31";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	chosen {
17*4882a593Smuzhiyun		stdout-path = &uart1;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory@80000000 {
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0x80000000 0x8000000>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	leds {
26*4882a593Smuzhiyun		compatible = "gpio-leds";
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		led0 {
29*4882a593Smuzhiyun			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		led1 {
33*4882a593Smuzhiyun			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&ata {
39*4882a593Smuzhiyun	status = "okay";
40*4882a593Smuzhiyun};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun&nfc {
43*4882a593Smuzhiyun	nand-bus-width = <8>;
44*4882a593Smuzhiyun	nand-ecc-mode = "hw";
45*4882a593Smuzhiyun	nand-on-flash-bbt;
46*4882a593Smuzhiyun	status = "okay";
47*4882a593Smuzhiyun};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun&sdhci1 {
50*4882a593Smuzhiyun	bus-width = <4>;
51*4882a593Smuzhiyun	cd-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
52*4882a593Smuzhiyun	wp-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
53*4882a593Smuzhiyun	status = "okay";
54*4882a593Smuzhiyun};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun&spi2 {
57*4882a593Smuzhiyun	status = "okay";
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	pmic@0 {
60*4882a593Smuzhiyun		compatible = "fsl,mc13783";
61*4882a593Smuzhiyun		reg = <0>;
62*4882a593Smuzhiyun		spi-cs-high;
63*4882a593Smuzhiyun		spi-max-frequency = <1000000>;
64*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
65*4882a593Smuzhiyun		interrupts = <3 IRQ_TYPE_EDGE_RISING>;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun		fsl,mc13xxx-uses-adc;
68*4882a593Smuzhiyun		fsl,mc13xxx-uses-rtc;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun		regulators {
71*4882a593Smuzhiyun			sw1a {		/* QVCC */
72*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
73*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
74*4882a593Smuzhiyun				regulator-always-on;
75*4882a593Smuzhiyun				regulator-boot-on;
76*4882a593Smuzhiyun			};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun			sw1b {		/* QVCC */
79*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
80*4882a593Smuzhiyun				regulator-max-microvolt = <1500000>;
81*4882a593Smuzhiyun				regulator-always-on;
82*4882a593Smuzhiyun				regulator-boot-on;
83*4882a593Smuzhiyun			};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun			sw2a {		/* 1.8V_DDR, NVCC2, NVCC21 and NVCC22 */
86*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
87*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
88*4882a593Smuzhiyun				regulator-always-on;
89*4882a593Smuzhiyun				regulator-boot-on;
90*4882a593Smuzhiyun			};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun			sw2b {		/* NVCC10 */
93*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
94*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
95*4882a593Smuzhiyun				regulator-always-on;
96*4882a593Smuzhiyun				regulator-boot-on;
97*4882a593Smuzhiyun			};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun			violo {		/* NVCC1 and NVCC7 */
100*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
101*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
102*4882a593Smuzhiyun				regulator-always-on;
103*4882a593Smuzhiyun				regulator-boot-on;
104*4882a593Smuzhiyun			};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun			viohi {		/* VIOHI */
107*4882a593Smuzhiyun				regulator-min-microvolt = <2775000>;
108*4882a593Smuzhiyun				regulator-max-microvolt = <2775000>;
109*4882a593Smuzhiyun				regulator-always-on;
110*4882a593Smuzhiyun				regulator-boot-on;
111*4882a593Smuzhiyun			};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun			vaudio {	/* VAUDIO */
114*4882a593Smuzhiyun				regulator-min-microvolt = <2775000>;
115*4882a593Smuzhiyun				regulator-max-microvolt = <2775000>;
116*4882a593Smuzhiyun			};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun			vcam {		/* NVCC4 */
119*4882a593Smuzhiyun				regulator-min-microvolt = <2800000>;
120*4882a593Smuzhiyun				regulator-max-microvolt = <2800000>;
121*4882a593Smuzhiyun			};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun			vgen {		/* NVCC5 / NVCC8 and NVCC6 / NVCC9 */
124*4882a593Smuzhiyun				regulator-min-microvolt = <2775000>;
125*4882a593Smuzhiyun				regulator-max-microvolt = <2775000>;
126*4882a593Smuzhiyun				regulator-always-on;
127*4882a593Smuzhiyun				regulator-boot-on;
128*4882a593Smuzhiyun			};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun			vmmc2 {		/* NVCC3 */
131*4882a593Smuzhiyun				regulator-min-microvolt = <1600000>;
132*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
133*4882a593Smuzhiyun				regulator-always-on;
134*4882a593Smuzhiyun				regulator-boot-on;
135*4882a593Smuzhiyun			};
136*4882a593Smuzhiyun		};
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&uart1 {
141*4882a593Smuzhiyun	uart-has-rtscts;
142*4882a593Smuzhiyun	status = "okay";
143*4882a593Smuzhiyun};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun/* Routed to the extension board */
146*4882a593Smuzhiyun&uart2 {
147*4882a593Smuzhiyun	uart-has-rtscts;
148*4882a593Smuzhiyun	status = "okay";
149*4882a593Smuzhiyun};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun/* Routed to the extension board */
152*4882a593Smuzhiyun&uart3 {
153*4882a593Smuzhiyun	uart-has-rtscts;
154*4882a593Smuzhiyun	status = "okay";
155*4882a593Smuzhiyun};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun&weim {
158*4882a593Smuzhiyun	status = "okay";
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun	nor@0,0 {
161*4882a593Smuzhiyun		compatible = "cfi-flash";
162*4882a593Smuzhiyun		reg = <0 0x0 0x200000>;
163*4882a593Smuzhiyun		bank-width = <2>;
164*4882a593Smuzhiyun		linux,mtd-name = "physmap-flash.0";
165*4882a593Smuzhiyun		fsl,weim-cs-timing = <0x0000cf03 0xa0330d01 0x00220800>;
166*4882a593Smuzhiyun	};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	ethernet@4,0 {
169*4882a593Smuzhiyun		compatible = "smsc,lan9117", "smsc,lan9115";
170*4882a593Smuzhiyun		reg = <4 0x0 0x100>;
171*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
172*4882a593Smuzhiyun		interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
173*4882a593Smuzhiyun		phy-mode = "mii";
174*4882a593Smuzhiyun		reg-io-width = <2>;
175*4882a593Smuzhiyun		smsc,irq-push-pull;
176*4882a593Smuzhiyun		fsl,weim-cs-timing = <0x00008701 0x04000541 0x00010000>;
177*4882a593Smuzhiyun	};
178*4882a593Smuzhiyun};
179