1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2012 Marek Vasut <marex@denx.de> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun#include "imx28.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "SchulerControl GmbH, SC SPS 1"; 11*4882a593Smuzhiyun compatible = "schulercontrol,imx28-sps1", "fsl,imx28"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun memory@40000000 { 14*4882a593Smuzhiyun device_type = "memory"; 15*4882a593Smuzhiyun reg = <0x40000000 0x08000000>; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun apb@80000000 { 19*4882a593Smuzhiyun apbh@80000000 { 20*4882a593Smuzhiyun pinctrl@80018000 { 21*4882a593Smuzhiyun pinctrl-names = "default"; 22*4882a593Smuzhiyun pinctrl-0 = <&hog_pins_a>; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun hog_pins_a: hog-gpios@0 { 25*4882a593Smuzhiyun reg = <0>; 26*4882a593Smuzhiyun fsl,pinmux-ids = < 27*4882a593Smuzhiyun MX28_PAD_GPMI_D00__GPIO_0_0 28*4882a593Smuzhiyun MX28_PAD_GPMI_D03__GPIO_0_3 29*4882a593Smuzhiyun MX28_PAD_GPMI_D06__GPIO_0_6 30*4882a593Smuzhiyun >; 31*4882a593Smuzhiyun fsl,drive-strength = <MXS_DRIVE_4mA>; 32*4882a593Smuzhiyun fsl,voltage = <MXS_VOLTAGE_HIGH>; 33*4882a593Smuzhiyun fsl,pull-up = <MXS_PULL_DISABLE>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun ssp0: spi@80010000 { 39*4882a593Smuzhiyun compatible = "fsl,imx28-mmc"; 40*4882a593Smuzhiyun pinctrl-names = "default"; 41*4882a593Smuzhiyun pinctrl-0 = <&mmc0_4bit_pins_a>; 42*4882a593Smuzhiyun bus-width = <4>; 43*4882a593Smuzhiyun status = "okay"; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun ssp2: spi@80014000 { 47*4882a593Smuzhiyun #address-cells = <1>; 48*4882a593Smuzhiyun #size-cells = <0>; 49*4882a593Smuzhiyun compatible = "fsl,imx28-spi"; 50*4882a593Smuzhiyun pinctrl-names = "default"; 51*4882a593Smuzhiyun pinctrl-0 = <&spi2_pins_a>; 52*4882a593Smuzhiyun status = "okay"; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun flash: flash@0 { 55*4882a593Smuzhiyun #address-cells = <1>; 56*4882a593Smuzhiyun #size-cells = <1>; 57*4882a593Smuzhiyun compatible = "everspin,mr25h256", "mr25h256"; 58*4882a593Smuzhiyun spi-max-frequency = <40000000>; 59*4882a593Smuzhiyun reg = <0>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun apbx@80040000 { 65*4882a593Smuzhiyun i2c0: i2c@80058000 { 66*4882a593Smuzhiyun pinctrl-names = "default"; 67*4882a593Smuzhiyun pinctrl-0 = <&i2c0_pins_a>; 68*4882a593Smuzhiyun status = "okay"; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun rtc: rtc@51 { 71*4882a593Smuzhiyun compatible = "nxp,pcf8563"; 72*4882a593Smuzhiyun reg = <0x51>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun eeprom: eeprom@52 { 76*4882a593Smuzhiyun compatible = "atmel,24c64"; 77*4882a593Smuzhiyun reg = <0x52>; 78*4882a593Smuzhiyun pagesize = <32>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun duart: serial@80074000 { 83*4882a593Smuzhiyun pinctrl-names = "default"; 84*4882a593Smuzhiyun pinctrl-0 = <&duart_pins_a>; 85*4882a593Smuzhiyun status = "okay"; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun usbphy0: usbphy@8007c000 { 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun auart0: serial@8006a000 { 93*4882a593Smuzhiyun pinctrl-names = "default"; 94*4882a593Smuzhiyun pinctrl-0 = <&auart0_pins_a>; 95*4882a593Smuzhiyun status = "okay"; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun ahb@80080000 { 101*4882a593Smuzhiyun usb0: usb@80080000 { 102*4882a593Smuzhiyun vbus-supply = <®_usb0_vbus>; 103*4882a593Smuzhiyun pinctrl-names = "default"; 104*4882a593Smuzhiyun pinctrl-0 = <&usb0_pins_b>; 105*4882a593Smuzhiyun status = "okay"; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun mac0: ethernet@800f0000 { 109*4882a593Smuzhiyun phy-mode = "rmii"; 110*4882a593Smuzhiyun pinctrl-names = "default"; 111*4882a593Smuzhiyun pinctrl-0 = <&mac0_pins_a>; 112*4882a593Smuzhiyun status = "okay"; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun mac1: ethernet@800f4000 { 116*4882a593Smuzhiyun phy-mode = "rmii"; 117*4882a593Smuzhiyun pinctrl-names = "default"; 118*4882a593Smuzhiyun pinctrl-0 = <&mac1_pins_a>; 119*4882a593Smuzhiyun status = "okay"; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun regulators { 124*4882a593Smuzhiyun compatible = "simple-bus"; 125*4882a593Smuzhiyun #address-cells = <1>; 126*4882a593Smuzhiyun #size-cells = <0>; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun reg_usb0_vbus: regulator@0 { 129*4882a593Smuzhiyun compatible = "regulator-fixed"; 130*4882a593Smuzhiyun reg = <0>; 131*4882a593Smuzhiyun regulator-name = "usb0_vbus"; 132*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 133*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 134*4882a593Smuzhiyun gpio = <&gpio3 9 0>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun leds { 139*4882a593Smuzhiyun #address-cells = <1>; 140*4882a593Smuzhiyun #size-cells = <0>; 141*4882a593Smuzhiyun compatible = "gpio-leds"; 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun led@1 { 145*4882a593Smuzhiyun label = "sps1-1:yellow:user"; 146*4882a593Smuzhiyun gpios = <&gpio0 6 0>; 147*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 148*4882a593Smuzhiyun reg = <0>; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun led@2 { 152*4882a593Smuzhiyun label = "sps1-2:red:user"; 153*4882a593Smuzhiyun gpios = <&gpio0 3 0>; 154*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 155*4882a593Smuzhiyun reg = <1>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun led@3 { 159*4882a593Smuzhiyun label = "sps1-3:red:user"; 160*4882a593Smuzhiyun gpios = <&gpio0 0 0>; 161*4882a593Smuzhiyun default-trigger = "heartbeat"; 162*4882a593Smuzhiyun reg = <2>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun}; 167