xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx28-cfa10055.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright 2013 Crystalfontz America, Inc.
4*4882a593Smuzhiyun * 				  Free Electrons
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/*
8*4882a593Smuzhiyun * The CFA-10055 is an expansion board for the CFA-10036 module and
9*4882a593Smuzhiyun * CFA-10037, thus we need to include the CFA-10037 DTS.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun#include "imx28-cfa10037.dts"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "Crystalfontz CFA-10055 Board";
15*4882a593Smuzhiyun	compatible = "crystalfontz,cfa10055", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	apb@80000000 {
18*4882a593Smuzhiyun		apbh@80000000 {
19*4882a593Smuzhiyun			pinctrl@80018000 {
20*4882a593Smuzhiyun				spi2_pins_cfa10055: spi2-cfa10055@0 {
21*4882a593Smuzhiyun					reg = <0>;
22*4882a593Smuzhiyun					fsl,pinmux-ids = <
23*4882a593Smuzhiyun						MX28_PAD_SSP2_SCK__GPIO_2_16
24*4882a593Smuzhiyun						MX28_PAD_SSP2_MOSI__GPIO_2_17
25*4882a593Smuzhiyun						MX28_PAD_SSP2_MISO__GPIO_2_18
26*4882a593Smuzhiyun						MX28_PAD_AUART1_TX__GPIO_3_5
27*4882a593Smuzhiyun					>;
28*4882a593Smuzhiyun					fsl,drive-strength = <MXS_DRIVE_8mA>;
29*4882a593Smuzhiyun					fsl,voltage = <MXS_VOLTAGE_HIGH>;
30*4882a593Smuzhiyun					fsl,pull-up = <MXS_PULL_ENABLE>;
31*4882a593Smuzhiyun				};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun				lcdif_18bit_pins_cfa10055: lcdif-18bit@0 {
34*4882a593Smuzhiyun					reg = <0>;
35*4882a593Smuzhiyun					fsl,pinmux-ids = <
36*4882a593Smuzhiyun						MX28_PAD_LCD_D00__LCD_D0
37*4882a593Smuzhiyun						MX28_PAD_LCD_D01__LCD_D1
38*4882a593Smuzhiyun						MX28_PAD_LCD_D02__LCD_D2
39*4882a593Smuzhiyun						MX28_PAD_LCD_D03__LCD_D3
40*4882a593Smuzhiyun						MX28_PAD_LCD_D04__LCD_D4
41*4882a593Smuzhiyun						MX28_PAD_LCD_D05__LCD_D5
42*4882a593Smuzhiyun						MX28_PAD_LCD_D06__LCD_D6
43*4882a593Smuzhiyun						MX28_PAD_LCD_D07__LCD_D7
44*4882a593Smuzhiyun						MX28_PAD_LCD_D08__LCD_D8
45*4882a593Smuzhiyun						MX28_PAD_LCD_D09__LCD_D9
46*4882a593Smuzhiyun						MX28_PAD_LCD_D10__LCD_D10
47*4882a593Smuzhiyun						MX28_PAD_LCD_D11__LCD_D11
48*4882a593Smuzhiyun						MX28_PAD_LCD_D12__LCD_D12
49*4882a593Smuzhiyun						MX28_PAD_LCD_D13__LCD_D13
50*4882a593Smuzhiyun						MX28_PAD_LCD_D14__LCD_D14
51*4882a593Smuzhiyun						MX28_PAD_LCD_D15__LCD_D15
52*4882a593Smuzhiyun						MX28_PAD_LCD_D16__LCD_D16
53*4882a593Smuzhiyun						MX28_PAD_LCD_D17__LCD_D17
54*4882a593Smuzhiyun					>;
55*4882a593Smuzhiyun					fsl,drive-strength = <MXS_DRIVE_4mA>;
56*4882a593Smuzhiyun					fsl,voltage = <MXS_VOLTAGE_HIGH>;
57*4882a593Smuzhiyun					fsl,pull-up = <MXS_PULL_DISABLE>;
58*4882a593Smuzhiyun				};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun				lcdif_pins_cfa10055: lcdif-evk@0 {
61*4882a593Smuzhiyun					reg = <0>;
62*4882a593Smuzhiyun					fsl,pinmux-ids = <
63*4882a593Smuzhiyun						MX28_PAD_LCD_RD_E__LCD_VSYNC
64*4882a593Smuzhiyun						MX28_PAD_LCD_WR_RWN__LCD_HSYNC
65*4882a593Smuzhiyun						MX28_PAD_LCD_RS__LCD_DOTCLK
66*4882a593Smuzhiyun						MX28_PAD_LCD_CS__LCD_ENABLE
67*4882a593Smuzhiyun					>;
68*4882a593Smuzhiyun					fsl,drive-strength = <MXS_DRIVE_4mA>;
69*4882a593Smuzhiyun					fsl,voltage = <MXS_VOLTAGE_HIGH>;
70*4882a593Smuzhiyun					fsl,pull-up = <MXS_PULL_DISABLE>;
71*4882a593Smuzhiyun				};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun				lcdif_pins_cfa10055_pullup: lcdif-10055-pullup@0 {
74*4882a593Smuzhiyun					reg = <0>;
75*4882a593Smuzhiyun					fsl,pinmux-ids = <
76*4882a593Smuzhiyun						MX28_PAD_LCD_RESET__GPIO_3_30
77*4882a593Smuzhiyun					>;
78*4882a593Smuzhiyun					fsl,drive-strength = <MXS_DRIVE_4mA>;
79*4882a593Smuzhiyun					fsl,voltage = <MXS_VOLTAGE_HIGH>;
80*4882a593Smuzhiyun					fsl,pull-up = <MXS_PULL_ENABLE>;
81*4882a593Smuzhiyun				};
82*4882a593Smuzhiyun			};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun			lcdif@80030000 {
85*4882a593Smuzhiyun				pinctrl-names = "default";
86*4882a593Smuzhiyun				pinctrl-0 = <&lcdif_18bit_pins_cfa10055
87*4882a593Smuzhiyun					     &lcdif_pins_cfa10055
88*4882a593Smuzhiyun					     &lcdif_pins_cfa10055_pullup>;
89*4882a593Smuzhiyun				display = <&display0>;
90*4882a593Smuzhiyun				status = "okay";
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun				display0: display0 {
93*4882a593Smuzhiyun					bits-per-pixel = <32>;
94*4882a593Smuzhiyun					bus-width = <18>;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun					display-timings {
97*4882a593Smuzhiyun						native-mode = <&timing0>;
98*4882a593Smuzhiyun						timing0: timing0 {
99*4882a593Smuzhiyun							clock-frequency = <9216000>;
100*4882a593Smuzhiyun							hactive = <320>;
101*4882a593Smuzhiyun							vactive = <480>;
102*4882a593Smuzhiyun							hback-porch = <2>;
103*4882a593Smuzhiyun							hfront-porch = <2>;
104*4882a593Smuzhiyun							vback-porch = <2>;
105*4882a593Smuzhiyun							vfront-porch = <2>;
106*4882a593Smuzhiyun							hsync-len = <15>;
107*4882a593Smuzhiyun							vsync-len = <15>;
108*4882a593Smuzhiyun							hsync-active = <0>;
109*4882a593Smuzhiyun							vsync-active = <0>;
110*4882a593Smuzhiyun							de-active = <1>;
111*4882a593Smuzhiyun							pixelclk-active = <1>;
112*4882a593Smuzhiyun						};
113*4882a593Smuzhiyun					};
114*4882a593Smuzhiyun				};
115*4882a593Smuzhiyun			};
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		apbx@80040000 {
119*4882a593Smuzhiyun			lradc@80050000 {
120*4882a593Smuzhiyun				fsl,lradc-touchscreen-wires = <4>;
121*4882a593Smuzhiyun				status = "okay";
122*4882a593Smuzhiyun			};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun			pwm: pwm@80064000 {
125*4882a593Smuzhiyun				pinctrl-names = "default";
126*4882a593Smuzhiyun				pinctrl-0 = <&pwm3_pins_b>;
127*4882a593Smuzhiyun				status = "okay";
128*4882a593Smuzhiyun			};
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	spi2 {
133*4882a593Smuzhiyun		compatible = "spi-gpio";
134*4882a593Smuzhiyun		pinctrl-names = "default";
135*4882a593Smuzhiyun		pinctrl-0 = <&spi2_pins_cfa10055>;
136*4882a593Smuzhiyun		status = "okay";
137*4882a593Smuzhiyun		gpio-sck = <&gpio2 16 0>;
138*4882a593Smuzhiyun		gpio-mosi = <&gpio2 17 0>;
139*4882a593Smuzhiyun		gpio-miso = <&gpio2 18 0>;
140*4882a593Smuzhiyun		cs-gpios = <&gpio3 5 0>;
141*4882a593Smuzhiyun		num-chipselects = <1>;
142*4882a593Smuzhiyun		#address-cells = <1>;
143*4882a593Smuzhiyun		#size-cells = <0>;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun		hx8357: hx8357@0 {
146*4882a593Smuzhiyun			compatible = "himax,hx8357b", "himax,hx8357";
147*4882a593Smuzhiyun			reg = <0>;
148*4882a593Smuzhiyun			spi-max-frequency = <100000>;
149*4882a593Smuzhiyun			spi-cpol;
150*4882a593Smuzhiyun			spi-cpha;
151*4882a593Smuzhiyun			gpios-reset = <&gpio3 30 0>;
152*4882a593Smuzhiyun		};
153*4882a593Smuzhiyun	};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun	backlight {
156*4882a593Smuzhiyun		compatible = "pwm-backlight";
157*4882a593Smuzhiyun		pwms = <&pwm 3 5000000>;
158*4882a593Smuzhiyun		brightness-levels = <0 4 8 16 32 64 128 255>;
159*4882a593Smuzhiyun		default-brightness-level = <6>;
160*4882a593Smuzhiyun	};
161*4882a593Smuzhiyun};
162