xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/imx28-apx4devkit.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/dts-v1/;
3*4882a593Smuzhiyun#include "imx28.dtsi"
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun/ {
6*4882a593Smuzhiyun	model = "Bluegiga APX4 Development Kit";
7*4882a593Smuzhiyun	compatible = "bluegiga,apx4devkit", "fsl,imx28";
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun	memory@40000000 {
10*4882a593Smuzhiyun		device_type = "memory";
11*4882a593Smuzhiyun		reg = <0x40000000 0x04000000>;
12*4882a593Smuzhiyun	};
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	apb@80000000 {
15*4882a593Smuzhiyun		apbh@80000000 {
16*4882a593Smuzhiyun			nand-controller@8000c000 {
17*4882a593Smuzhiyun				pinctrl-names = "default";
18*4882a593Smuzhiyun				pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
19*4882a593Smuzhiyun				status = "okay";
20*4882a593Smuzhiyun			};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun			ssp0: spi@80010000 {
23*4882a593Smuzhiyun				compatible = "fsl,imx28-mmc";
24*4882a593Smuzhiyun				pinctrl-names = "default";
25*4882a593Smuzhiyun				pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_sck_cfg>;
26*4882a593Smuzhiyun				bus-width = <4>;
27*4882a593Smuzhiyun				status = "okay";
28*4882a593Smuzhiyun			};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun			ssp2: spi@80014000 {
31*4882a593Smuzhiyun				compatible = "fsl,imx28-mmc";
32*4882a593Smuzhiyun				pinctrl-names = "default";
33*4882a593Smuzhiyun				pinctrl-0 = <&mmc2_4bit_pins_apx4 &mmc2_sck_cfg_apx4>;
34*4882a593Smuzhiyun				bus-width = <4>;
35*4882a593Smuzhiyun				status = "okay";
36*4882a593Smuzhiyun			};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun			pinctrl@80018000 {
39*4882a593Smuzhiyun				pinctrl-names = "default";
40*4882a593Smuzhiyun				pinctrl-0 = <&hog_pins_a>;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun				hog_pins_a: hog@0 {
43*4882a593Smuzhiyun					reg = <0>;
44*4882a593Smuzhiyun					fsl,pinmux-ids = <
45*4882a593Smuzhiyun						MX28_PAD_GPMI_CE1N__GPIO_0_17
46*4882a593Smuzhiyun						MX28_PAD_GPMI_RDY1__GPIO_0_21
47*4882a593Smuzhiyun						MX28_PAD_SSP2_MISO__GPIO_2_18
48*4882a593Smuzhiyun						MX28_PAD_SSP2_SS0__AUART3_TX /* was: 0x2131 - MX28_PAD_SSP2_SS0__GPIO_2_19 */
49*4882a593Smuzhiyun						MX28_PAD_PWM3__GPIO_3_28
50*4882a593Smuzhiyun						MX28_PAD_LCD_RESET__GPIO_3_30
51*4882a593Smuzhiyun						MX28_PAD_JTAG_RTCK__GPIO_4_20
52*4882a593Smuzhiyun					>;
53*4882a593Smuzhiyun					fsl,drive-strength = <MXS_DRIVE_4mA>;
54*4882a593Smuzhiyun					fsl,voltage = <MXS_VOLTAGE_HIGH>;
55*4882a593Smuzhiyun					fsl,pull-up = <MXS_PULL_DISABLE>;
56*4882a593Smuzhiyun				};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun				lcdif_pins_apx4: lcdif-apx4@0 {
59*4882a593Smuzhiyun					reg = <0>;
60*4882a593Smuzhiyun					fsl,pinmux-ids = <
61*4882a593Smuzhiyun						MX28_PAD_LCD_RD_E__LCD_VSYNC
62*4882a593Smuzhiyun						MX28_PAD_LCD_WR_RWN__LCD_HSYNC
63*4882a593Smuzhiyun						MX28_PAD_LCD_RS__LCD_DOTCLK
64*4882a593Smuzhiyun						MX28_PAD_LCD_CS__LCD_ENABLE
65*4882a593Smuzhiyun					>;
66*4882a593Smuzhiyun					fsl,drive-strength = <MXS_DRIVE_4mA>;
67*4882a593Smuzhiyun					fsl,voltage = <MXS_VOLTAGE_HIGH>;
68*4882a593Smuzhiyun					fsl,pull-up = <MXS_PULL_DISABLE>;
69*4882a593Smuzhiyun				};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun				mmc2_4bit_pins_apx4: mmc2-4bit-apx4@0 {
72*4882a593Smuzhiyun					reg = <0>;
73*4882a593Smuzhiyun					fsl,pinmux-ids = <
74*4882a593Smuzhiyun						MX28_PAD_SSP0_DATA4__SSP2_D0
75*4882a593Smuzhiyun						MX28_PAD_SSP0_DATA5__SSP2_D3
76*4882a593Smuzhiyun						MX28_PAD_SSP0_DATA6__SSP2_CMD
77*4882a593Smuzhiyun						MX28_PAD_SSP0_DATA7__SSP2_SCK
78*4882a593Smuzhiyun						MX28_PAD_SSP2_SS1__SSP2_D1
79*4882a593Smuzhiyun						MX28_PAD_SSP2_SS2__SSP2_D2
80*4882a593Smuzhiyun					>;
81*4882a593Smuzhiyun					fsl,drive-strength = <MXS_DRIVE_8mA>;
82*4882a593Smuzhiyun					fsl,voltage = <MXS_VOLTAGE_HIGH>;
83*4882a593Smuzhiyun					fsl,pull-up = <MXS_PULL_ENABLE>;
84*4882a593Smuzhiyun				};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun				mmc2_sck_cfg_apx4: mmc2-sck-cfg-apx4@0 {
87*4882a593Smuzhiyun					reg = <0>;
88*4882a593Smuzhiyun					fsl,pinmux-ids = <
89*4882a593Smuzhiyun						MX28_PAD_SSP0_DATA7__SSP2_SCK
90*4882a593Smuzhiyun					>;
91*4882a593Smuzhiyun					fsl,drive-strength = <MXS_DRIVE_12mA>;
92*4882a593Smuzhiyun					fsl,pull-up = <MXS_PULL_DISABLE>;
93*4882a593Smuzhiyun				};
94*4882a593Smuzhiyun			};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun			lcdif@80030000 {
97*4882a593Smuzhiyun				pinctrl-names = "default";
98*4882a593Smuzhiyun				pinctrl-0 = <&lcdif_24bit_pins_a
99*4882a593Smuzhiyun					     &lcdif_pins_apx4>;
100*4882a593Smuzhiyun				display = <&display0>;
101*4882a593Smuzhiyun				status = "okay";
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun				display0: display0 {
104*4882a593Smuzhiyun					bits-per-pixel = <32>;
105*4882a593Smuzhiyun					bus-width = <24>;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun					display-timings {
108*4882a593Smuzhiyun						native-mode = <&timing0>;
109*4882a593Smuzhiyun						timing0: timing0 {
110*4882a593Smuzhiyun							clock-frequency = <30000000>;
111*4882a593Smuzhiyun							hactive = <800>;
112*4882a593Smuzhiyun							vactive = <480>;
113*4882a593Smuzhiyun							hback-porch = <88>;
114*4882a593Smuzhiyun							hfront-porch = <40>;
115*4882a593Smuzhiyun							vback-porch = <32>;
116*4882a593Smuzhiyun							vfront-porch = <13>;
117*4882a593Smuzhiyun							hsync-len = <48>;
118*4882a593Smuzhiyun							vsync-len = <3>;
119*4882a593Smuzhiyun							hsync-active = <1>;
120*4882a593Smuzhiyun							vsync-active = <1>;
121*4882a593Smuzhiyun							de-active = <1>;
122*4882a593Smuzhiyun							pixelclk-active = <0>;
123*4882a593Smuzhiyun						};
124*4882a593Smuzhiyun					};
125*4882a593Smuzhiyun				};
126*4882a593Smuzhiyun			};
127*4882a593Smuzhiyun		};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		apbx@80040000 {
130*4882a593Smuzhiyun			saif0: saif@80042000 {
131*4882a593Smuzhiyun				pinctrl-names = "default";
132*4882a593Smuzhiyun				pinctrl-0 = <&saif0_pins_a>;
133*4882a593Smuzhiyun				status = "okay";
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun			saif1: saif@80046000 {
137*4882a593Smuzhiyun				pinctrl-names = "default";
138*4882a593Smuzhiyun				pinctrl-0 = <&saif1_pins_a>;
139*4882a593Smuzhiyun				fsl,saif-master = <&saif0>;
140*4882a593Smuzhiyun				status = "okay";
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun			i2c0: i2c@80058000 {
144*4882a593Smuzhiyun				pinctrl-names = "default";
145*4882a593Smuzhiyun				pinctrl-0 = <&i2c0_pins_a>;
146*4882a593Smuzhiyun				status = "okay";
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun				sgtl5000: codec@a {
149*4882a593Smuzhiyun					compatible = "fsl,sgtl5000";
150*4882a593Smuzhiyun					reg = <0x0a>;
151*4882a593Smuzhiyun					#sound-dai-cells = <0>;
152*4882a593Smuzhiyun					VDDA-supply = <&reg_3p3v>;
153*4882a593Smuzhiyun					VDDIO-supply = <&reg_3p3v>;
154*4882a593Smuzhiyun					clocks = <&saif0>;
155*4882a593Smuzhiyun				};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun				pcf8563: rtc@51 {
158*4882a593Smuzhiyun					compatible = "phg,pcf8563";
159*4882a593Smuzhiyun					reg = <0x51>;
160*4882a593Smuzhiyun				};
161*4882a593Smuzhiyun			};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun			duart: serial@80074000 {
164*4882a593Smuzhiyun				pinctrl-names = "default";
165*4882a593Smuzhiyun				pinctrl-0 = <&duart_pins_a>;
166*4882a593Smuzhiyun				status = "okay";
167*4882a593Smuzhiyun			};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun			auart0: serial@8006a000 {
170*4882a593Smuzhiyun				pinctrl-names = "default";
171*4882a593Smuzhiyun				pinctrl-0 = <&auart0_pins_a>;
172*4882a593Smuzhiyun				status = "okay";
173*4882a593Smuzhiyun			};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun			auart1: serial@8006c000 {
176*4882a593Smuzhiyun				pinctrl-names = "default";
177*4882a593Smuzhiyun				pinctrl-0 = <&auart1_2pins_a>;
178*4882a593Smuzhiyun				status = "okay";
179*4882a593Smuzhiyun			};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun			auart2: serial@8006e000 {
182*4882a593Smuzhiyun				pinctrl-names = "default";
183*4882a593Smuzhiyun				pinctrl-0 = <&auart2_2pins_a>;
184*4882a593Smuzhiyun				status = "okay";
185*4882a593Smuzhiyun			};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun			usbphy1: usbphy@8007e000 {
188*4882a593Smuzhiyun				pinctrl-names = "default";
189*4882a593Smuzhiyun				pinctrl-0 = <&usb1_pins_a>;
190*4882a593Smuzhiyun				status = "okay";
191*4882a593Smuzhiyun			};
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun	ahb@80080000 {
196*4882a593Smuzhiyun		usb1: usb@80090000 {
197*4882a593Smuzhiyun		      status = "okay";
198*4882a593Smuzhiyun		};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun		mac0: ethernet@800f0000 {
201*4882a593Smuzhiyun			phy-mode = "rmii";
202*4882a593Smuzhiyun			pinctrl-names = "default";
203*4882a593Smuzhiyun			pinctrl-0 = <&mac0_pins_a>;
204*4882a593Smuzhiyun			status = "okay";
205*4882a593Smuzhiyun		};
206*4882a593Smuzhiyun	};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun	regulators {
209*4882a593Smuzhiyun		compatible = "simple-bus";
210*4882a593Smuzhiyun		#address-cells = <1>;
211*4882a593Smuzhiyun		#size-cells = <0>;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun		reg_3p3v: regulator@0 {
214*4882a593Smuzhiyun			compatible = "regulator-fixed";
215*4882a593Smuzhiyun			reg = <0>;
216*4882a593Smuzhiyun			regulator-name = "3P3V";
217*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
218*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
219*4882a593Smuzhiyun			regulator-always-on;
220*4882a593Smuzhiyun		};
221*4882a593Smuzhiyun	};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun	sound {
224*4882a593Smuzhiyun		compatible = "bluegiga,apx4devkit-sgtl5000",
225*4882a593Smuzhiyun			     "fsl,mxs-audio-sgtl5000";
226*4882a593Smuzhiyun		model = "apx4devkit-sgtl5000";
227*4882a593Smuzhiyun		saif-controllers = <&saif0 &saif1>;
228*4882a593Smuzhiyun		audio-codec = <&sgtl5000>;
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun	leds {
232*4882a593Smuzhiyun		compatible = "gpio-leds";
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun		user {
235*4882a593Smuzhiyun			label = "Heartbeat";
236*4882a593Smuzhiyun			gpios = <&gpio3 28 0>;
237*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
238*4882a593Smuzhiyun		};
239*4882a593Smuzhiyun	};
240*4882a593Smuzhiyun};
241