1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun// 3*4882a593Smuzhiyun// Copyright 2012 Sascha Hauer, Pengutronix 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun#include "imx27.dtsi" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "Freescale i.MX27 Product Development Kit"; 10*4882a593Smuzhiyun compatible = "fsl,imx27-pdk", "fsl,imx27"; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun memory@a0000000 { 13*4882a593Smuzhiyun device_type = "memory"; 14*4882a593Smuzhiyun reg = <0xa0000000 0x08000000>; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun usbphy { 18*4882a593Smuzhiyun compatible = "simple-bus"; 19*4882a593Smuzhiyun #address-cells = <1>; 20*4882a593Smuzhiyun #size-cells = <0>; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun usbphy0: usbphy@0 { 23*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 24*4882a593Smuzhiyun reg = <0>; 25*4882a593Smuzhiyun clocks = <&clks IMX27_CLK_DUMMY>; 26*4882a593Smuzhiyun clock-names = "main_clk"; 27*4882a593Smuzhiyun #phy-cells = <0>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&cspi2 { 33*4882a593Smuzhiyun pinctrl-names = "default"; 34*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_cspi2>; 35*4882a593Smuzhiyun cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>; 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun pmic: mc13783@0 { 39*4882a593Smuzhiyun compatible = "fsl,mc13783"; 40*4882a593Smuzhiyun reg = <0>; 41*4882a593Smuzhiyun spi-cs-high; 42*4882a593Smuzhiyun spi-max-frequency = <1000000>; 43*4882a593Smuzhiyun interrupt-parent = <&gpio3>; 44*4882a593Smuzhiyun interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun regulators { 47*4882a593Smuzhiyun vgen_reg: vgen { 48*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 49*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 50*4882a593Smuzhiyun regulator-always-on; 51*4882a593Smuzhiyun regulator-boot-on; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun vmmc1_reg: vmmc1 { 55*4882a593Smuzhiyun regulator-min-microvolt = <1600000>; 56*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun gpo1_reg: gpo1 { 60*4882a593Smuzhiyun regulator-always-on; 61*4882a593Smuzhiyun regulator-boot-on; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun gpo3_reg: gpo3 { 65*4882a593Smuzhiyun regulator-always-on; 66*4882a593Smuzhiyun regulator-boot-on; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&fec { 73*4882a593Smuzhiyun phy-mode = "mii"; 74*4882a593Smuzhiyun pinctrl-names = "default"; 75*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_fec>; 76*4882a593Smuzhiyun status = "okay"; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&kpp { 80*4882a593Smuzhiyun linux,keymap = < 81*4882a593Smuzhiyun MATRIX_KEY(0, 0, KEY_UP) 82*4882a593Smuzhiyun MATRIX_KEY(0, 1, KEY_DOWN) 83*4882a593Smuzhiyun MATRIX_KEY(1, 0, KEY_RIGHT) 84*4882a593Smuzhiyun MATRIX_KEY(1, 1, KEY_LEFT) 85*4882a593Smuzhiyun MATRIX_KEY(1, 2, KEY_ENTER) 86*4882a593Smuzhiyun MATRIX_KEY(2, 0, KEY_F6) 87*4882a593Smuzhiyun MATRIX_KEY(2, 1, KEY_F8) 88*4882a593Smuzhiyun MATRIX_KEY(2, 2, KEY_F9) 89*4882a593Smuzhiyun MATRIX_KEY(2, 3, KEY_F10) 90*4882a593Smuzhiyun >; 91*4882a593Smuzhiyun status = "okay"; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&nfc { 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_nand>; 97*4882a593Smuzhiyun nand-ecc-mode = "hw"; 98*4882a593Smuzhiyun nand-on-flash-bbt; 99*4882a593Smuzhiyun status = "okay"; 100*4882a593Smuzhiyun}; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun&uart1 { 103*4882a593Smuzhiyun uart-has-rtscts; 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_uart1>; 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun}; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun&usbotg { 110*4882a593Smuzhiyun pinctrl-names = "default"; 111*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usbotg>; 112*4882a593Smuzhiyun dr_mode = "otg"; 113*4882a593Smuzhiyun fsl,usbphy = <&usbphy0>; 114*4882a593Smuzhiyun phy_type = "ulpi"; 115*4882a593Smuzhiyun status = "okay"; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&iomuxc { 119*4882a593Smuzhiyun imx27-pdk { 120*4882a593Smuzhiyun pinctrl_cspi2: cspi2grp { 121*4882a593Smuzhiyun fsl,pins = < 122*4882a593Smuzhiyun MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0 123*4882a593Smuzhiyun MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0 124*4882a593Smuzhiyun MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0 125*4882a593Smuzhiyun MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */ 126*4882a593Smuzhiyun MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */ 127*4882a593Smuzhiyun >; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun pinctrl_fec: fecgrp { 131*4882a593Smuzhiyun fsl,pins = < 132*4882a593Smuzhiyun MX27_PAD_SD3_CMD__FEC_TXD0 0x0 133*4882a593Smuzhiyun MX27_PAD_SD3_CLK__FEC_TXD1 0x0 134*4882a593Smuzhiyun MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 135*4882a593Smuzhiyun MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 136*4882a593Smuzhiyun MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 137*4882a593Smuzhiyun MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 138*4882a593Smuzhiyun MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 139*4882a593Smuzhiyun MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 140*4882a593Smuzhiyun MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 141*4882a593Smuzhiyun MX27_PAD_ATA_DATA7__FEC_MDC 0x0 142*4882a593Smuzhiyun MX27_PAD_ATA_DATA8__FEC_CRS 0x0 143*4882a593Smuzhiyun MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 144*4882a593Smuzhiyun MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 145*4882a593Smuzhiyun MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 146*4882a593Smuzhiyun MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 147*4882a593Smuzhiyun MX27_PAD_ATA_DATA13__FEC_COL 0x0 148*4882a593Smuzhiyun MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 149*4882a593Smuzhiyun MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 150*4882a593Smuzhiyun >; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun pinctrl_nand: nandgrp { 154*4882a593Smuzhiyun fsl,pins = < 155*4882a593Smuzhiyun MX27_PAD_NFRB__NFRB 0x0 156*4882a593Smuzhiyun MX27_PAD_NFCLE__NFCLE 0x0 157*4882a593Smuzhiyun MX27_PAD_NFWP_B__NFWP_B 0x0 158*4882a593Smuzhiyun MX27_PAD_NFCE_B__NFCE_B 0x0 159*4882a593Smuzhiyun MX27_PAD_NFALE__NFALE 0x0 160*4882a593Smuzhiyun MX27_PAD_NFRE_B__NFRE_B 0x0 161*4882a593Smuzhiyun MX27_PAD_NFWE_B__NFWE_B 0x0 162*4882a593Smuzhiyun >; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun pinctrl_uart1: uart1grp { 166*4882a593Smuzhiyun fsl,pins = < 167*4882a593Smuzhiyun MX27_PAD_UART1_TXD__UART1_TXD 0x0 168*4882a593Smuzhiyun MX27_PAD_UART1_RXD__UART1_RXD 0x0 169*4882a593Smuzhiyun MX27_PAD_UART1_CTS__UART1_CTS 0x0 170*4882a593Smuzhiyun MX27_PAD_UART1_RTS__UART1_RTS 0x0 171*4882a593Smuzhiyun >; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun pinctrl_usbotg: usbotggrp { 175*4882a593Smuzhiyun fsl,pins = < 176*4882a593Smuzhiyun MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0 177*4882a593Smuzhiyun MX27_PAD_USBOTG_STP__USBOTG_STP 0x0 178*4882a593Smuzhiyun MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0 179*4882a593Smuzhiyun MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0 180*4882a593Smuzhiyun MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0 181*4882a593Smuzhiyun MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0 182*4882a593Smuzhiyun MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0 183*4882a593Smuzhiyun MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0 184*4882a593Smuzhiyun MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0 185*4882a593Smuzhiyun MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0 186*4882a593Smuzhiyun MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0 187*4882a593Smuzhiyun MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0 188*4882a593Smuzhiyun >; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun}; 192